pseudo_inst.cc (11793:ef606668d247) | pseudo_inst.cc (12334:e0ab29a34764) |
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1/* 2 * Copyright (c) 2014 Advanced Micro Devices, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 16 unchanged lines hidden (view full) --- 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Alexandru Dutu 29 */ 30 31#include "arch/generic/pseudo_inst.hh" 32 | 1/* 2 * Copyright (c) 2014 Advanced Micro Devices, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 16 unchanged lines hidden (view full) --- 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Alexandru Dutu 29 */ 30 31#include "arch/generic/pseudo_inst.hh" 32 |
33#include "base/misc.hh" | 33#include "base/logging.hh" |
34 35class ThreadContext; 36 37using namespace GenericISA; 38 39void 40GenericISA::m5Syscall(ThreadContext *tc) 41{ 42 panic("m5Syscall not implemented for current ISA"); 43} 44 45void 46GenericISA::m5PageFault(ThreadContext *tc) 47{ 48 panic("m5PageFault not implemented for current ISA"); 49} | 34 35class ThreadContext; 36 37using namespace GenericISA; 38 39void 40GenericISA::m5Syscall(ThreadContext *tc) 41{ 42 panic("m5Syscall not implemented for current ISA"); 43} 44 45void 46GenericISA::m5PageFault(ThreadContext *tc) 47{ 48 panic("m5PageFault not implemented for current ISA"); 49} |