1/* 2 * Copyright (c) 2013 Andreas Sandberg 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 35 unchanged lines hidden (view full) --- 44 45namespace GenericISA 46{ 47 /** @{ */ 48 /** 49 * Memory requests with the MMAPPED_IPR flag are generally mapped 50 * to registers. There is a class of these registers that are 51 * internal to gem5, for example gem5 pseudo-ops in virtualized |
52 * mode. Such IPRs always have the flag GENERIC_IPR set and are 53 * handled by this code. |
54 */ 55 |
56 /** Shift amount when extracting the class of a generic IPR */ 57 const int IPR_CLASS_SHIFT = 48; |
58 59 /** Mask to extract the offset in within a generic IPR class */ 60 const Addr IPR_IN_CLASS_MASK = ULL(0x0000FFFFFFFFFFFF); 61 62 /** gem5 pseudo-inst emulation. 63 * 64 * Read and writes to this class execute gem5 65 * pseudo-instructions. A write discards the return value of the --- 12 unchanged lines hidden (view full) --- 78 * 79 * @param func Function ID to call. 80 * @param subfunc Sub-function, usually 0. 81 * @return Address in the IPR space corresponding to the call. 82 */ 83 inline Addr 84 iprAddressPseudoInst(uint8_t func, uint8_t subfunc) 85 { |
86 return (IPR_CLASS_PSEUDO_INST << IPR_CLASS_SHIFT) | |
87 (func << 8) | subfunc; 88 } 89 90 /** 91 * Check if this is an platform independent IPR access 92 * 93 * Accesses to internal platform independent gem5 registers are 94 * handled by handleGenericIprRead() and 95 * handleGenericIprWrite(). This method determines if a packet 96 * should be routed to those functions instead of the platform 97 * specific code. 98 * 99 * @see handleGenericIprRead 100 * @see handleGenericIprWrite 101 */ 102 inline bool 103 isGenericIprAccess(const Packet *pkt) 104 { |
105 Request::Flags flags(pkt->req->getFlags()); 106 return (flags & Request::MMAPPED_IPR) && 107 (flags & Request::GENERIC_IPR); |
108 } 109 110 /** 111 * Handle generic IPR reads 112 * 113 * @param xc Thread context of the current thread. 114 * @param pkt Packet from the CPU 115 * @return Latency in CPU cycles --- 57 unchanged lines hidden --- |