mmapped_ipr.cc (9897:e105fbf799e7) mmapped_ipr.cc (9911:676d3dcf1cc2)
1/*
2 * Copyright (c) 2013 Andreas Sandberg
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 39 unchanged lines hidden (view full) ---

48 if (pkt->isRead())
49 pkt->set(ret);
50}
51
52Cycles
53GenericISA::handleGenericIprRead(ThreadContext *xc, Packet *pkt)
54{
55 Addr va(pkt->getAddr());
1/*
2 * Copyright (c) 2013 Andreas Sandberg
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 39 unchanged lines hidden (view full) ---

48 if (pkt->isRead())
49 pkt->set(ret);
50}
51
52Cycles
53GenericISA::handleGenericIprRead(ThreadContext *xc, Packet *pkt)
54{
55 Addr va(pkt->getAddr());
56 Addr cls((va & IPR_CLASS_MASK) >> IPR_CLASS_SHIFT);
56 Addr cls(va >> IPR_CLASS_SHIFT);
57
58 switch (cls) {
59 case IPR_CLASS_PSEUDO_INST:
60 handlePseudoInst(xc, pkt);
61 break;
62 default:
63 panic("Unhandled generic IPR read: 0x%x\n", va);
64 }
65
66 return Cycles(1);
67}
68
69Cycles
70GenericISA::handleGenericIprWrite(ThreadContext *xc, Packet *pkt)
71{
72 Addr va(pkt->getAddr());
57
58 switch (cls) {
59 case IPR_CLASS_PSEUDO_INST:
60 handlePseudoInst(xc, pkt);
61 break;
62 default:
63 panic("Unhandled generic IPR read: 0x%x\n", va);
64 }
65
66 return Cycles(1);
67}
68
69Cycles
70GenericISA::handleGenericIprWrite(ThreadContext *xc, Packet *pkt)
71{
72 Addr va(pkt->getAddr());
73 Addr cls((va & IPR_CLASS_MASK) >> IPR_CLASS_SHIFT);
73 Addr cls(va >> IPR_CLASS_SHIFT);
74
75 switch (cls) {
76 case IPR_CLASS_PSEUDO_INST:
77 handlePseudoInst(xc, pkt);
78 break;
79 default:
80 panic("Unhandled generic IPR write: 0x%x\n", va);
81 }
82
83 return Cycles(1);
84}
74
75 switch (cls) {
76 case IPR_CLASS_PSEUDO_INST:
77 handlePseudoInst(xc, pkt);
78 break;
79 default:
80 panic("Unhandled generic IPR write: 0x%x\n", va);
81 }
82
83 return Cycles(1);
84}