vtophys.cc (7651:84a44eb3ccb8) | vtophys.cc (7694:de057cccee82) |
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1/* | 1/* |
2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * |
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2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * Copyright (c) 2007-2008 The Florida State University 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer; --- 18 unchanged lines hidden (view full) --- 28 * 29 * Authors: Ali Saidi 30 * Nathan Binkert 31 * Stephen Hines 32 */ 33 34#include <string> 35 | 14 * Copyright (c) 2002-2005 The Regents of The University of Michigan 15 * Copyright (c) 2007-2008 The Florida State University 16 * All rights reserved. 17 * 18 * Redistribution and use in source and binary forms, with or without 19 * modification, are permitted provided that the following conditions are 20 * met: redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer; --- 18 unchanged lines hidden (view full) --- 40 * 41 * Authors: Ali Saidi 42 * Nathan Binkert 43 * Stephen Hines 44 */ 45 46#include <string> 47 |
48#include "arch/arm/table_walker.hh" 49#include "arch/arm/tlb.hh" |
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36#include "arch/arm/vtophys.hh" 37#include "base/chunk_generator.hh" 38#include "base/trace.hh" 39#include "cpu/thread_context.hh" 40#include "mem/vport.hh" 41 42using namespace std; 43using namespace ArmISA; 44 45Addr 46ArmISA::vtophys(Addr vaddr) 47{ | 50#include "arch/arm/vtophys.hh" 51#include "base/chunk_generator.hh" 52#include "base/trace.hh" 53#include "cpu/thread_context.hh" 54#include "mem/vport.hh" 55 56using namespace std; 57using namespace ArmISA; 58 59Addr 60ArmISA::vtophys(Addr vaddr) 61{ |
48 fatal("VTOPHYS: Can't convert vaddr to paddr on ARM without a thread context"); | 62 fatal("VTOPHYS: Can't convert vaddr to paddr on ARM without a thread context"); |
49} 50 51Addr 52ArmISA::vtophys(ThreadContext *tc, Addr addr) 53{ | 63} 64 65Addr 66ArmISA::vtophys(ThreadContext *tc, Addr addr) 67{ |
54 fatal("VTOPHYS: Unimplemented on ARM\n"); | 68 SCTLR sctlr = tc->readMiscReg(MISCREG_SCTLR); 69 if (!sctlr.m) { 70 // Translation is currently disabled PA == VA 71 return addr; 72 } 73 bool success; 74 Addr pa; 75 ArmISA::TLB *tlb; 76 77 // Check the TLBs far a translation 78 // It's possible that there is a validy translation in the tlb 79 // that is no loger valid in the page table in memory 80 // so we need to check here first 81 tlb = static_cast<ArmISA::TLB*>(tc->getDTBPtr()); 82 success = tlb->translateFunctional(tc, addr, pa); 83 if (success) 84 return pa; 85 86 tlb = static_cast<ArmISA::TLB*>(tc->getITBPtr()); 87 success = tlb->translateFunctional(tc, addr, pa); 88 if (success) 89 return pa; 90 91 // We've failed everything, so we need to do a 92 // hardware tlb walk without messing with any 93 // state 94 95 uint32_t N = tc->readMiscReg(MISCREG_TTBCR); 96 Addr ttbr; 97 if (N == 0 || !mbits(addr, 31, 32-N)) { 98 ttbr = tc->readMiscReg(MISCREG_TTBR0); 99 } else { 100 ttbr = tc->readMiscReg(MISCREG_TTBR1); 101 N = 0; 102 } 103 104 FunctionalPort *port = tc->getPhysPort(); 105 Addr l1desc_addr = mbits(ttbr, 31, 14-N) | (bits(addr,31-N,20) << 2); 106 107 TableWalker::L1Descriptor l1desc; 108 l1desc.data = port->read<uint32_t>(l1desc_addr); 109 if (l1desc.type() == TableWalker::L1Descriptor::Ignore || 110 l1desc.type() == TableWalker::L1Descriptor::Reserved) { 111 warn("Unable to translate virtual address: %#x\n", addr); 112 return -1; 113 } 114 if (l1desc.type() == TableWalker::L1Descriptor::Section) 115 return l1desc.paddr(addr); 116 117 // Didn't find it at the first level, try againt 118 Addr l2desc_addr = l1desc.l2Addr() | (bits(addr, 19, 12) << 2); 119 TableWalker::L2Descriptor l2desc; 120 l2desc.data = port->read<uint32_t>(l2desc_addr); 121 122 if (l2desc.invalid()) { 123 warn("Unable to translate virtual address: %#x\n", addr); 124 return -1; 125 } 126 127 return l2desc.paddr(addr); |
55} 56 | 128} 129 |
130bool 131ArmISA::virtvalid(ThreadContext *tc, Addr vaddr) 132{ 133 if (vtophys(tc, vaddr) != -1) 134 return true; 135 return false; 136} 137 138 |
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