utility.cc (9431:8bb372a49e1b) | utility.cc (9920:028e4da64b42) |
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1/* 2 * Copyright (c) 2009-2012 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 99 unchanged lines hidden (view full) --- 108 } 109 return arg; 110 } 111} 112 113void 114skipFunction(ThreadContext *tc) 115{ | 1/* 2 * Copyright (c) 2009-2012 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 99 unchanged lines hidden (view full) --- 108 } 109 return arg; 110 } 111} 112 113void 114skipFunction(ThreadContext *tc) 115{ |
116 TheISA::PCState newPC = tc->pcState(); | 116 PCState newPC = tc->pcState(); |
117 newPC.set(tc->readIntReg(ReturnAddressReg) & ~ULL(1)); 118 119 CheckerCPU *checker = tc->getCheckerCpuPtr(); 120 if (checker) { 121 tc->pcStateNoRecord(newPC); 122 } else { 123 tc->pcState(newPC); 124 } 125} 126 127void 128copyRegs(ThreadContext *src, ThreadContext *dest) 129{ | 117 newPC.set(tc->readIntReg(ReturnAddressReg) & ~ULL(1)); 118 119 CheckerCPU *checker = tc->getCheckerCpuPtr(); 120 if (checker) { 121 tc->pcStateNoRecord(newPC); 122 } else { 123 tc->pcState(newPC); 124 } 125} 126 127void 128copyRegs(ThreadContext *src, ThreadContext *dest) 129{ |
130 for (int i = 0; i < TheISA::NumIntRegs; i++) | 130 for (int i = 0; i < NumIntRegs; i++) |
131 dest->setIntRegFlat(i, src->readIntRegFlat(i)); 132 | 131 dest->setIntRegFlat(i, src->readIntRegFlat(i)); 132 |
133 for (int i = 0; i < TheISA::NumFloatRegs; i++) | 133 for (int i = 0; i < NumFloatRegs; i++) |
134 dest->setFloatRegFlat(i, src->readFloatRegFlat(i)); 135 | 134 dest->setFloatRegFlat(i, src->readFloatRegFlat(i)); 135 |
136 for (int i = 0; i < TheISA::NumMiscRegs; i++) | 136 // Would need to add condition-code regs if implemented 137 assert(NumCCRegs == 0); 138 139 for (int i = 0; i < NumMiscRegs; i++) |
137 dest->setMiscRegNoEffect(i, src->readMiscRegNoEffect(i)); 138 139 // setMiscReg "with effect" will set the misc register mapping correctly. 140 // e.g. updateRegMap(val) 141 dest->setMiscReg(MISCREG_CPSR, src->readMiscRegNoEffect(MISCREG_CPSR)); 142 143 // Copy over the PC State 144 dest->pcState(src->pcState()); --- 19 unchanged lines hidden --- | 140 dest->setMiscRegNoEffect(i, src->readMiscRegNoEffect(i)); 141 142 // setMiscReg "with effect" will set the misc register mapping correctly. 143 // e.g. updateRegMap(val) 144 dest->setMiscReg(MISCREG_CPSR, src->readMiscRegNoEffect(MISCREG_CPSR)); 145 146 // Copy over the PC State 147 dest->pcState(src->pcState()); --- 19 unchanged lines hidden --- |