utility.cc (7707:e5b6f1157be3) | utility.cc (7720:65d338a8dba4) |
---|---|
1/* 2 * Copyright (c) 2009-2010 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 114 unchanged lines hidden (view full) --- 123 return new UnimpFault(csprintf("MRC CP15: CRn: %d opc1: %d CRm: %d opc1: %d\n", 124 CRn, opc1, CRm, opc2)); 125 126} 127 128void 129skipFunction(ThreadContext *tc) 130{ | 1/* 2 * Copyright (c) 2009-2010 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 114 unchanged lines hidden (view full) --- 123 return new UnimpFault(csprintf("MRC CP15: CRn: %d opc1: %d CRm: %d opc1: %d\n", 124 CRn, opc1, CRm, opc2)); 125 126} 127 128void 129skipFunction(ThreadContext *tc) 130{ |
131 Addr newpc = tc->readIntReg(ReturnAddressReg); 132 newpc &= ~ULL(1); 133 if (isThumb(tc->readPC())) 134 tc->setPC(newpc | PcTBit); 135 else 136 tc->setPC(newpc); 137 tc->setNextPC(tc->readPC() + sizeof(TheISA::MachInst)); | 131 TheISA::PCState newPC = tc->pcState(); 132 newPC.set(tc->readIntReg(ReturnAddressReg) & ~ULL(1)); 133 tc->pcState(newPC); |
138} 139 140 141} | 134} 135 136 137} |