utility.cc (13999:a26c2e234a80) utility.cc (14001:11216534c23e)
1/*
1/*
2 * Copyright (c) 2009-2014, 2016-2018 ARM Limited
2 * Copyright (c) 2009-2014, 2016-2019 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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575 case MISCREG_MAIR0:
576 case MISCREG_MAIR1:
577 case MISCREG_CONTEXTIDR:
578 trapToHype = hcr.tvm & !isRead;
579 break;
580 case MISCREG_PMCR:
581 trapToHype = hdcr.tpmcr;
582 break;
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

--- 564 unchanged lines hidden (view full) ---

575 case MISCREG_MAIR0:
576 case MISCREG_MAIR1:
577 case MISCREG_CONTEXTIDR:
578 trapToHype = hcr.tvm & !isRead;
579 break;
580 case MISCREG_PMCR:
581 trapToHype = hdcr.tpmcr;
582 break;
583 // GICv3 regs
584 case MISCREG_ICC_SGI0R:
585 if (tc->getIsaPtr()->haveGICv3CpuIfc())
586 trapToHype = hcr.fmo;
587 break;
588 case MISCREG_ICC_SGI1R:
589 case MISCREG_ICC_ASGI1R:
590 if (tc->getIsaPtr()->haveGICv3CpuIfc())
591 trapToHype = hcr.imo;
592 break;
583 // No default action needed
584 default:
585 break;
586 }
587 }
588 }
589 return trapToHype;
590}

--- 282 unchanged lines hidden --- 		593 // No default action needed
594 default:
595 break;
596 }
597 }
598 }
599 return trapToHype;
600}

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