utility.cc (12109:f29e9c5418aa) utility.cc (12406:86bde4a026b5)
1/*
2 * Copyright (c) 2009-2014, 2016 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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166 // setMiscReg "with effect" will set the misc register mapping correctly.
167 // e.g. updateRegMap(val)
168 dest->setMiscReg(MISCREG_CPSR, src->readMiscRegNoEffect(MISCREG_CPSR));
169
170 // Copy over the PC State
171 dest->pcState(src->pcState());
172
173 // Invalidate the tlb misc register cache
1/*
2 * Copyright (c) 2009-2014, 2016 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 157 unchanged lines hidden (view full) ---

166 // setMiscReg "with effect" will set the misc register mapping correctly.
167 // e.g. updateRegMap(val)
168 dest->setMiscReg(MISCREG_CPSR, src->readMiscRegNoEffect(MISCREG_CPSR));
169
170 // Copy over the PC State
171 dest->pcState(src->pcState());
172
173 // Invalidate the tlb misc register cache
174 dest->getITBPtr()->invalidateMiscReg();
175 dest->getDTBPtr()->invalidateMiscReg();
174 dynamic_cast<TLB *>(dest->getITBPtr())->invalidateMiscReg();
175 dynamic_cast<TLB *>(dest->getDTBPtr())->invalidateMiscReg();
176}
177
178bool
179inSecureState(ThreadContext *tc)
180{
181 SCR scr = inAArch64(tc) ? tc->readMiscReg(MISCREG_SCR_EL3) :
182 tc->readMiscReg(MISCREG_SCR);
183 return ArmSystem::haveSecurity(tc) && inSecureState(

--- 756 unchanged lines hidden --- 		176}
177
178bool
179inSecureState(ThreadContext *tc)
180{
181 SCR scr = inAArch64(tc) ? tc->readMiscReg(MISCREG_SCR_EL3) :
182 tc->readMiscReg(MISCREG_SCR);
183 return ArmSystem::haveSecurity(tc) && inSecureState(

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