utility.cc (10474:799c8ee4ecba) utility.cc (10854:f449d6f8a647)
1/*
2 * Copyright (c) 2009-2014 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 258 unchanged lines hidden (view full) ---

267 return ((SCTLR) tc->readMiscReg(MISCREG_SCTLR_EL1)).e0e;
268 default:
269 panic("Invalid exception level");
270 break;
271 }
272}
273
274Addr
1/*
2 * Copyright (c) 2009-2014 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 258 unchanged lines hidden (view full) ---

267 return ((SCTLR) tc->readMiscReg(MISCREG_SCTLR_EL1)).e0e;
268 default:
269 panic("Invalid exception level");
270 break;
271 }
272}
273
274Addr
275purifyTaggedAddr(Addr addr, ThreadContext *tc, ExceptionLevel el,
276 TTBCR tcr)
277{
278 switch (el) {
279 case EL0:
280 case EL1:
281 if (bits(addr, 55, 48) == 0xFF && tcr.tbi1)
282 return addr | mask(63, 55);
283 else if (!bits(addr, 55, 48) && tcr.tbi0)
284 return bits(addr,55, 0);
285 break;
286 // @todo: uncomment this to enable Virtualization
287 // case EL2:
288 // assert(ArmSystem::haveVirtualization());
289 // tcr = tc->readMiscReg(MISCREG_TCR_EL2);
290 // if (tcr.tbi)
291 // return addr & mask(56);
292 // break;
293 case EL3:
294 assert(ArmSystem::haveSecurity(tc));
295 if (tcr.tbi)
296 return addr & mask(56);
297 break;
298 default:
299 panic("Invalid exception level");
300 break;
301 }
302
303 return addr; // Nothing to do if this is not a tagged address
304}
305
306Addr
275purifyTaggedAddr(Addr addr, ThreadContext *tc, ExceptionLevel el)
276{
277 TTBCR tcr;
278
279 switch (el) {
280 case EL0:
281 case EL1:
282 tcr = tc->readMiscReg(MISCREG_TCR_EL1);

--- 702 unchanged lines hidden --- 		307purifyTaggedAddr(Addr addr, ThreadContext *tc, ExceptionLevel el)
308{
309 TTBCR tcr;
310
311 switch (el) {
312 case EL0:
313 case EL1:
314 tcr = tc->readMiscReg(MISCREG_TCR_EL1);

--- 702 unchanged lines hidden ---