utility.cc (10103:af1ec649e251) utility.cc (10190:fb83d025d1c3)
1/*
2 * Copyright (c) 2009-2013 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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190{
191 TTBCR ttbcr = tc->readMiscReg(MISCREG_TTBCR);
192 return ArmSystem::haveLPAE(tc) && ttbcr.eae;
193}
194
195uint32_t
196getMPIDR(ArmSystem *arm_sys, ThreadContext *tc)
197{
1/*
2 * Copyright (c) 2009-2013 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 181 unchanged lines hidden (view full) ---

190{
191 TTBCR ttbcr = tc->readMiscReg(MISCREG_TTBCR);
192 return ArmSystem::haveLPAE(tc) && ttbcr.eae;
193}
194
195uint32_t
196getMPIDR(ArmSystem *arm_sys, ThreadContext *tc)
197{
198 // Multiprocessor Affinity Register MPIDR from Cortex(tm)-A15 Technical
199 // Reference Manual
200 //
201 // bit 31 - Multi-processor extensions available
202 // bit 30 - Uni-processor system
203 // bit 24 - Multi-threaded cores
204 // bit 11-8 - Cluster ID
205 // bit 1-0 - CPU ID
206 //
207 // We deliberately extend both the Cluster ID and CPU ID fields to allow
208 // for simulation of larger systems
209 assert((0 <= tc->cpuId()) && (tc->cpuId() < 256));
210 assert((0 <= tc->socketId()) && (tc->socketId() < 65536));
198 if (arm_sys->multiProc) {
199 return 0x80000000 | // multiprocessor extensions available
211 if (arm_sys->multiProc) {
212 return 0x80000000 | // multiprocessor extensions available
200 tc->cpuId();
213 tc->cpuId() | tc->socketId() << 8;
201 } else {
202 return 0x80000000 | // multiprocessor extensions available
203 0x40000000 | // in up system
214 } else {
215 return 0x80000000 | // multiprocessor extensions available
216 0x40000000 | // in up system
204 tc->cpuId();
217 tc->cpuId() | tc->socketId() << 8;
205 }
206}
207
208bool
209ELIs64(ThreadContext *tc, ExceptionLevel el)
210{
211 if (ArmSystem::highestEL(tc) == el)
212 // Register width is hard-wired

--- 757 unchanged lines hidden --- 		218 }
219}
220
221bool
222ELIs64(ThreadContext *tc, ExceptionLevel el)
223{
224 if (ArmSystem::highestEL(tc) == el)
225 // Register width is hard-wired

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