types.hh (6251:1d794d81a4e6) types.hh (6254:8abc40611938)
1/*
2 * Copyright (c) 2007-2008 The Florida State University
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 158 unchanged lines hidden (view full) ---

167 Bitfield<3> fpRegImm;
168 Bitfield<3, 0> fm;
169 Bitfield<2, 0> fpImm;
170 Bitfield<24, 20> punwl;
171
172 Bitfield<7, 0> m5Func;
173 EndBitUnion(ExtMachInst)
174
1/*
2 * Copyright (c) 2007-2008 The Florida State University
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 158 unchanged lines hidden (view full) ---

167 Bitfield<3> fpRegImm;
168 Bitfield<3, 0> fm;
169 Bitfield<2, 0> fpImm;
170 Bitfield<24, 20> punwl;
171
172 Bitfield<7, 0> m5Func;
173 EndBitUnion(ExtMachInst)
174
175 // Shift types for ARM instructions
176 enum ArmShiftType {
177 LSL = 0,
178 LSR,
179 ASR,
180 ROR
181 };
182
175 typedef uint8_t RegIndex;
176
177 typedef uint64_t IntReg;
178 typedef uint64_t LargestRead;
179 // Need to use 64 bits to make sure that read requests get handled properly
180
181 // floating point register file entry type
182 typedef uint32_t FloatReg32;

--- 67 unchanged lines hidden --- 		183 typedef uint8_t RegIndex;
184
185 typedef uint64_t IntReg;
186 typedef uint64_t LargestRead;
187 // Need to use 64 bits to make sure that read requests get handled properly
188
189 // floating point register file entry type
190 typedef uint32_t FloatReg32;

--- 67 unchanged lines hidden ---