types.hh (7744:9e11081542e4) | types.hh (7858:ee6641d7c713) |
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1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 188 unchanged lines hidden (view full) --- 197 typedef GenericISA::UPCState<MachInst> Base; 198 199 enum FlagBits { 200 ThumbBit = (1 << 0), 201 JazelleBit = (1 << 1) 202 }; 203 uint8_t flags; 204 uint8_t nextFlags; | 1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 188 unchanged lines hidden (view full) --- 197 typedef GenericISA::UPCState<MachInst> Base; 198 199 enum FlagBits { 200 ThumbBit = (1 << 0), 201 JazelleBit = (1 << 1) 202 }; 203 uint8_t flags; 204 uint8_t nextFlags; |
205 | 205 uint8_t forcedItStateValue; 206 bool forcedItStateValid; |
206 public: | 207 public: |
207 PCState() : flags(0), nextFlags(0) | 208 PCState() : flags(0), nextFlags(0), forcedItStateValue(0), forcedItStateValid(false) |
208 {} 209 210 void 211 set(Addr val) 212 { 213 Base::set(val); 214 npc(val + (thumb() ? 2 : 4)); 215 } 216 | 209 {} 210 211 void 212 set(Addr val) 213 { 214 Base::set(val); 215 npc(val + (thumb() ? 2 : 4)); 216 } 217 |
217 PCState(Addr val) : flags(0), nextFlags(0) | 218 PCState(Addr val) : flags(0), nextFlags(0), forcedItStateValue(0), forcedItStateValid(false) |
218 { set(val); } 219 220 bool 221 thumb() const 222 { 223 return flags & ThumbBit; 224 } 225 --- 46 unchanged lines hidden (view full) --- 272 nextJazelle(bool val) 273 { 274 if (val) 275 nextFlags |= JazelleBit; 276 else 277 nextFlags &= ~JazelleBit; 278 } 279 | 219 { set(val); } 220 221 bool 222 thumb() const 223 { 224 return flags & ThumbBit; 225 } 226 --- 46 unchanged lines hidden (view full) --- 273 nextJazelle(bool val) 274 { 275 if (val) 276 nextFlags |= JazelleBit; 277 else 278 nextFlags &= ~JazelleBit; 279 } 280 |
281 uint8_t 282 forcedItState() const 283 { 284 return forcedItStateValue; 285 } 286 |
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280 void | 287 void |
288 forcedItState(uint8_t value) 289 { 290 forcedItStateValue = value; 291 // Not valid unless the advance is called. 292 forcedItStateValid = false; 293 } 294 295 bool 296 forcedItStateIsValid() const 297 { 298 return forcedItStateValid; 299 } 300 301 void |
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281 advance() 282 { 283 Base::advance(); 284 npc(pc() + (thumb() ? 2 : 4)); 285 flags = nextFlags; | 302 advance() 303 { 304 Base::advance(); 305 npc(pc() + (thumb() ? 2 : 4)); 306 flags = nextFlags; |
307 308 // Validate the itState 309 if (forcedItStateValue != 0 && !forcedItStateValid) { 310 forcedItStateValid = true; 311 } else { 312 forcedItStateValid = false; 313 forcedItStateValue = 0; 314 } |
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286 } 287 288 void 289 uEnd() 290 { 291 advance(); 292 upc(0); 293 nupc(1); --- 67 unchanged lines hidden (view full) --- 361 } 362 363 void 364 serialize(std::ostream &os) 365 { 366 Base::serialize(os); 367 SERIALIZE_SCALAR(flags); 368 SERIALIZE_SCALAR(nextFlags); | 315 } 316 317 void 318 uEnd() 319 { 320 advance(); 321 upc(0); 322 nupc(1); --- 67 unchanged lines hidden (view full) --- 390 } 391 392 void 393 serialize(std::ostream &os) 394 { 395 Base::serialize(os); 396 SERIALIZE_SCALAR(flags); 397 SERIALIZE_SCALAR(nextFlags); |
398 SERIALIZE_SCALAR(forcedItStateValue); 399 SERIALIZE_SCALAR(forcedItStateValid); |
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369 } 370 371 void 372 unserialize(Checkpoint *cp, const std::string §ion) 373 { 374 Base::unserialize(cp, section); 375 UNSERIALIZE_SCALAR(flags); 376 UNSERIALIZE_SCALAR(nextFlags); | 400 } 401 402 void 403 unserialize(Checkpoint *cp, const std::string §ion) 404 { 405 Base::unserialize(cp, section); 406 UNSERIALIZE_SCALAR(flags); 407 UNSERIALIZE_SCALAR(nextFlags); |
408 UNSERIALIZE_SCALAR(forcedItStateValue); 409 UNSERIALIZE_SCALAR(forcedItStateValid); |
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377 } 378 }; 379 380 // Shift types for ARM instructions 381 enum ArmShiftType { 382 LSL = 0, 383 LSR, 384 ASR, --- 87 unchanged lines hidden --- | 410 } 411 }; 412 413 // Shift types for ARM instructions 414 enum ArmShiftType { 415 LSL = 0, 416 LSR, 417 ASR, --- 87 unchanged lines hidden --- |