1/*
2 * Copyright (c) 2010, 2012-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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63 */
64 Bitfield<7, 4> cond;
65 Bitfield<3, 0> mask;
66 // Bitfields for moving to/from CPSR
67 Bitfield<7, 2> top6;
68 Bitfield<1, 0> bottom2;
69 EndBitUnion(ITSTATE)
70
71
72 BitUnion64(ExtMachInst)
73 // ITSTATE bits
74 Bitfield<55, 48> itstate;
75 Bitfield<55, 52> itstateCond;
76 Bitfield<51, 48> itstateMask;
77
78 // FPSCR fields
79 Bitfield<41, 40> fpscrStride;
80 Bitfield<39, 37> fpscrLen;

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621 EC_DATA_ABORT_FROM_HYP = 0x25,
622 EC_DATA_ABORT_CURR_EL = 0x25, // AArch64 alias
623 EC_STACK_PTR_ALIGNMENT = 0x26,
624 EC_FP_EXCEPTION = 0x28,
625 EC_FP_EXCEPTION_64 = 0x2C,
626 EC_SERROR = 0x2F
627 };
628
629 BitUnion8(OperatingMode64)
630 Bitfield<0> spX;
631 Bitfield<3, 2> el;
632 Bitfield<4> width;
633 EndBitUnion(OperatingMode64)
634
635 static bool inline
636 opModeIs64(OperatingMode mode)

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