tarmac_parser.hh (12749:223c83ed9979) tarmac_parser.hh (13915:24ae4ea846c9)
1/*
2 * Copyright (c) 2011,2017-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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78 * Reference to the TARMAC trace object to which this record belongs.
79 */
80 TarmacParser& parent;
81 /** Current thread context. */
82 ThreadContext* thread;
83 /** Current instruction. */
84 const StaticInstPtr inst;
85 /** PC of the current instruction. */
1/*
2 * Copyright (c) 2011,2017-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 69 unchanged lines hidden (view full) ---

78 * Reference to the TARMAC trace object to which this record belongs.
79 */
80 TarmacParser& parent;
81 /** Current thread context. */
82 ThreadContext* thread;
83 /** Current instruction. */
84 const StaticInstPtr inst;
85 /** PC of the current instruction. */
86 TheISA::PCState pc;
86 ArmISA::PCState pc;
87 /** True if a mismatch has been detected for this instruction. */
88 bool mismatch;
89 /**
90 * True if a mismatch has been detected for this instruction on PC or
91 * opcode.
92 */
93 bool mismatchOnPcOrOpcode;
94
95 TarmacParserRecordEvent(TarmacParser& _parent,
96 ThreadContext *_thread,
97 const StaticInstPtr _inst,
87 /** True if a mismatch has been detected for this instruction. */
88 bool mismatch;
89 /**
90 * True if a mismatch has been detected for this instruction on PC or
91 * opcode.
92 */
93 bool mismatchOnPcOrOpcode;
94
95 TarmacParserRecordEvent(TarmacParser& _parent,
96 ThreadContext *_thread,
97 const StaticInstPtr _inst,
98 TheISA::PCState _pc,
98 ArmISA::PCState _pc,
99 bool _mismatch,
100 bool _mismatch_on_pc_or_opcode) :
101 parent(_parent), thread(_thread), inst(_inst), pc(_pc),
102 mismatch(_mismatch),
103 mismatchOnPcOrOpcode(_mismatch_on_pc_or_opcode)
104 {
105 }
106

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125
126 static const int MaxLineLength = 256;
127
128 /**
129 * Print a mismatch header containing the instruction fields as reported
130 * by gem5.
131 */
132 static void printMismatchHeader(const StaticInstPtr inst,
99 bool _mismatch,
100 bool _mismatch_on_pc_or_opcode) :
101 parent(_parent), thread(_thread), inst(_inst), pc(_pc),
102 mismatch(_mismatch),
103 mismatchOnPcOrOpcode(_mismatch_on_pc_or_opcode)
104 {
105 }
106

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125
126 static const int MaxLineLength = 256;
127
128 /**
129 * Print a mismatch header containing the instruction fields as reported
130 * by gem5.
131 */
132 static void printMismatchHeader(const StaticInstPtr inst,
133 TheISA::PCState pc);
133 ArmISA::PCState pc);
134
135 TarmacParserRecord(Tick _when, ThreadContext *_thread,
134
135 TarmacParserRecord(Tick _when, ThreadContext *_thread,
136 const StaticInstPtr _staticInst, TheISA::PCState _pc,
136 const StaticInstPtr _staticInst, ArmISA::PCState _pc,
137 TarmacParser& _parent,
138 const StaticInstPtr _macroStaticInst = NULL);
139
140 void dump() override;
141
142 /**
143 * Performs a memory access to read the value written by a previous write.
144 * @return False if the result of the memory access should be ignored

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236
237 virtual ~TarmacParser()
238 {
239 trace.close();
240 }
241
242 InstRecord *
243 getInstRecord(Tick when, ThreadContext *tc, const StaticInstPtr staticInst,
137 TarmacParser& _parent,
138 const StaticInstPtr _macroStaticInst = NULL);
139
140 void dump() override;
141
142 /**
143 * Performs a memory access to read the value written by a previous write.
144 * @return False if the result of the memory access should be ignored

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236
237 virtual ~TarmacParser()
238 {
239 trace.close();
240 }
241
242 InstRecord *
243 getInstRecord(Tick when, ThreadContext *tc, const StaticInstPtr staticInst,
244 TheISA::PCState pc,
244 ArmISA::PCState pc,
245 const StaticInstPtr macroStaticInst = NULL)
246 {
247 if (!started && pc.pc() == startPc)
248 started = true;
249
250 if (started)
251 return new TarmacParserRecord(when, tc, staticInst, pc, *this,
252 macroStaticInst);

--- 47 unchanged lines hidden --- 		245 const StaticInstPtr macroStaticInst = NULL)
246 {
247 if (!started && pc.pc() == startPc)
248 started = true;
249
250 if (started)
251 return new TarmacParserRecord(when, tc, staticInst, pc, *this,
252 macroStaticInst);

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