tlb.hh (7404:bfc74724914e) tlb.hh (7406:ddc26bd4ea7d)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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82 };
83 protected:
84 typedef std::multimap<Addr, int> PageTable;
85 PageTable lookupTable; // Quick lookup into page table
86
87 TlbEntry *table; // the Page Table
88 int size; // TLB Size
89 int nlu; // not last used entry (for replacement)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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82 };
83 protected:
84 typedef std::multimap<Addr, int> PageTable;
85 PageTable lookupTable; // Quick lookup into page table
86
87 TlbEntry *table; // the Page Table
88 int size; // TLB Size
89 int nlu; // not last used entry (for replacement)
90
91#if FULL_SYSTEM
90 TableWalker *tableWalker;
92 TableWalker *tableWalker;
93#endif
91
92 void nextnlu() { if (++nlu >= size) nlu = 0; }
93 TlbEntry *lookup(Addr vpn, uint8_t asn);
94
95 // Access Stats
96 mutable Stats::Scalar read_hits;
97 mutable Stats::Scalar read_misses;
98 mutable Stats::Scalar read_acv;

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131 void flushAsid(uint64_t asn);
132
133 /** Remove all entries that match the va regardless of asn
134 * @param mva address to flush from cache
135 */
136 void flushMva(Addr mva);
137
138 Fault trickBoxCheck(RequestPtr req, Mode mode, uint8_t domain, bool sNp);
94
95 void nextnlu() { if (++nlu >= size) nlu = 0; }
96 TlbEntry *lookup(Addr vpn, uint8_t asn);
97
98 // Access Stats
99 mutable Stats::Scalar read_hits;
100 mutable Stats::Scalar read_misses;
101 mutable Stats::Scalar read_acv;

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134 void flushAsid(uint64_t asn);
135
136 /** Remove all entries that match the va regardless of asn
137 * @param mva address to flush from cache
138 */
139 void flushMva(Addr mva);
140
141 Fault trickBoxCheck(RequestPtr req, Mode mode, uint8_t domain, bool sNp);
139 Fault walkTrickBoxCheck(Addr pa, Addr va, Addr sz, bool is_exec, uint8_t
140 domain, bool sNp);
142 Fault walkTrickBoxCheck(Addr pa, Addr va, Addr sz, bool is_exec,
143 bool is_write, uint8_t domain, bool sNp);
141
142 void printTlb();
143
144 void demapPage(Addr vaddr, uint64_t asn)
145 {
146 flushMvaAsid(vaddr, asn);
147 }
148

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145 void printTlb();
146
147 void demapPage(Addr vaddr, uint64_t asn)
148 {
149 flushMvaAsid(vaddr, asn);
150 }
151

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