tlb.hh (12605:16476b32138d) tlb.hh (12735:e3da526a0654)
1/*
2 * Copyright (c) 2010-2013, 2016 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 125 unchanged lines hidden (view full) ---

134 // for these instructions
135 S1E0Tran = 0x8,
136 S1E1Tran = 0x10,
137 S1E2Tran = 0x20,
138 S1E3Tran = 0x40,
139 S12E0Tran = 0x80,
140 S12E1Tran = 0x100
141 };
1/*
2 * Copyright (c) 2010-2013, 2016 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 125 unchanged lines hidden (view full) ---

134 // for these instructions
135 S1E0Tran = 0x8,
136 S1E1Tran = 0x10,
137 S1E2Tran = 0x20,
138 S1E3Tran = 0x40,
139 S12E0Tran = 0x80,
140 S12E1Tran = 0x100
141 };
142
143 /**
144 * Determine the EL to use for the purpose of a translation given
145 * a specific translation type. If the translation type doesn't
146 * specify an EL, we use the current EL.
147 */
148 static ExceptionLevel tranTypeEL(CPSR cpsr, ArmTranslationType type);
149
142 protected:
143 TlbEntry* table; // the Page Table
144 int size; // TLB Size
145 bool isStage2; // Indicates this TLB is part of the second stage MMU
146 bool stage2Req; // Indicates whether a stage 2 lookup is also required
147 uint64_t _attr; // Memory attributes for last accessed TLB entry
148 bool directToStage2; // Indicates whether all translation requests should
149 // be routed directly to the stage 2 TLB

--- 319 unchanged lines hidden --- 		150 protected:
151 TlbEntry* table; // the Page Table
152 int size; // TLB Size
153 bool isStage2; // Indicates this TLB is part of the second stage MMU
154 bool stage2Req; // Indicates whether a stage 2 lookup is also required
155 uint64_t _attr; // Memory attributes for last accessed TLB entry
156 bool directToStage2; // Indicates whether all translation requests should
157 // be routed directly to the stage 2 TLB

--- 319 unchanged lines hidden ---