tlb.hh (11169:44b5c183c3cd) tlb.hh (11395:032bc62120eb)
1/*
2 * Copyright (c) 2010-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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56
57class ThreadContext;
58
59namespace ArmISA {
60
61class TableWalker;
62class Stage2LookUp;
63class Stage2MMU;
1/*
2 * Copyright (c) 2010-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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56
57class ThreadContext;
58
59namespace ArmISA {
60
61class TableWalker;
62class Stage2LookUp;
63class Stage2MMU;
64class TLB;
64
65
66class TlbTestInterface
67{
68 public:
69 TlbTestInterface() {}
70 virtual ~TlbTestInterface() {}
71
72 /**
73 * Check if a TLB translation should be forced to fail.
74 *
75 * @param req Request requiring a translation.
76 * @param is_priv Access from a privileged mode (i.e., not EL0)
77 * @param mode Access type
78 * @param domain Domain type
79 */
80 virtual Fault translationCheck(RequestPtr req, bool is_priv,
81 BaseTLB::Mode mode,
82 TlbEntry::DomainType domain) = 0;
83
84 /**
85 * Check if a page table walker access should be forced to fail.
86 *
87 * @param pa Physical address the walker is accessing
88 * @param size Walker access size
89 * @param va Virtual address that initiated the walk
90 * @param is_secure Access from secure state
91 * @param is_priv Access from a privileged mode (i.e., not EL0)
92 * @param mode Access type
93 * @param domain Domain type
94 * @param lookup_level Page table walker level
95 */
96 virtual Fault walkCheck(Addr pa, Addr size, Addr va, bool is_secure,
97 Addr is_priv, BaseTLB::Mode mode,
98 TlbEntry::DomainType domain,
99 LookupLevel lookup_level) = 0;
100};
101
65class TLB : public BaseTLB
66{
67 public:
68 enum ArmFlags {
69 AlignmentMask = 0x7,
70
71 AlignByte = 0x0,
72 AlignHalfWord = 0x1,

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100 uint64_t _attr; // Memory attributes for last accessed TLB entry
101 bool directToStage2; // Indicates whether all translation requests should
102 // be routed directly to the stage 2 TLB
103
104 TableWalker *tableWalker;
105 TLB *stage2Tlb;
106 Stage2MMU *stage2Mmu;
107
102class TLB : public BaseTLB
103{
104 public:
105 enum ArmFlags {
106 AlignmentMask = 0x7,
107
108 AlignByte = 0x0,
109 AlignHalfWord = 0x1,

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137 uint64_t _attr; // Memory attributes for last accessed TLB entry
138 bool directToStage2; // Indicates whether all translation requests should
139 // be routed directly to the stage 2 TLB
140
141 TableWalker *tableWalker;
142 TLB *stage2Tlb;
143 Stage2MMU *stage2Mmu;
144
145 TlbTestInterface *test;
146
108 // Access Stats
109 mutable Stats::Scalar instHits;
110 mutable Stats::Scalar instMisses;
111 mutable Stats::Scalar readHits;
112 mutable Stats::Scalar readMisses;
113 mutable Stats::Scalar writeHits;
114 mutable Stats::Scalar writeMisses;
115 mutable Stats::Scalar inserts;

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155
156 virtual ~TLB();
157
158 void takeOverFrom(BaseTLB *otlb) override;
159
160 /// setup all the back pointers
161 void init() override;
162
147 // Access Stats
148 mutable Stats::Scalar instHits;
149 mutable Stats::Scalar instMisses;
150 mutable Stats::Scalar readHits;
151 mutable Stats::Scalar readMisses;
152 mutable Stats::Scalar writeHits;
153 mutable Stats::Scalar writeMisses;
154 mutable Stats::Scalar inserts;

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194
195 virtual ~TLB();
196
197 void takeOverFrom(BaseTLB *otlb) override;
198
199 /// setup all the back pointers
200 void init() override;
201
202 void setTestInterface(SimObject *ti);
203
163 TableWalker *getTableWalker() { return tableWalker; }
164
165 void setMMU(Stage2MMU *m, MasterID master_id);
166
167 int getsize() const { return size; }
168
169 void insert(Addr vaddr, TlbEntry &pte);
170

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219
220 /** Remove all entries that match the va regardless of asn
221 * @param mva address to flush from cache
222 * @param secure_lookup if the operation affects the secure world
223 * @param hyp if the operation affects hyp mode
224 */
225 void flushMva(Addr mva, bool secure_lookup, bool hyp, uint8_t target_el);
226
204 TableWalker *getTableWalker() { return tableWalker; }
205
206 void setMMU(Stage2MMU *m, MasterID master_id);
207
208 int getsize() const { return size; }
209
210 void insert(Addr vaddr, TlbEntry &pte);
211

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260
261 /** Remove all entries that match the va regardless of asn
262 * @param mva address to flush from cache
263 * @param secure_lookup if the operation affects the secure world
264 * @param hyp if the operation affects hyp mode
265 */
266 void flushMva(Addr mva, bool secure_lookup, bool hyp, uint8_t target_el);
267
227 Fault trickBoxCheck(RequestPtr req, Mode mode, TlbEntry::DomainType domain);
228 Fault walkTrickBoxCheck(Addr pa, bool is_secure, Addr va, Addr sz, bool is_exec,
229 bool is_write, TlbEntry::DomainType domain, LookupLevel lookup_level);
230
231 void printTlb() const;
232
233 void demapPage(Addr vaddr, uint64_t asn) override
234 {
235 // needed for x86 only
236 panic("demapPage() is not implemented.\n");
237 }
238

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351 * @param secure_lookup if the operation affects the secure world
352 * @param hyp if the operation affects hyp mode
353 * @param ignore_asn if the flush should ignore the asn
354 */
355 void _flushMva(Addr mva, uint64_t asn, bool secure_lookup,
356 bool hyp, bool ignore_asn, uint8_t target_el);
357
358 bool checkELMatch(uint8_t target_el, uint8_t tentry_el, bool ignore_el);
268 void printTlb() const;
269
270 void demapPage(Addr vaddr, uint64_t asn) override
271 {
272 // needed for x86 only
273 panic("demapPage() is not implemented.\n");
274 }
275

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388 * @param secure_lookup if the operation affects the secure world
389 * @param hyp if the operation affects hyp mode
390 * @param ignore_asn if the flush should ignore the asn
391 */
392 void _flushMva(Addr mva, uint64_t asn, bool secure_lookup,
393 bool hyp, bool ignore_asn, uint8_t target_el);
394
395 bool checkELMatch(uint8_t target_el, uint8_t tentry_el, bool ignore_el);
396
397 public: /* Testing */
398 Fault testTranslation(RequestPtr req, Mode mode,
399 TlbEntry::DomainType domain);
400 Fault testWalk(Addr pa, Addr size, Addr va, bool is_secure, Mode mode,
401 TlbEntry::DomainType domain,
402 LookupLevel lookup_level);
359};
360
361} // namespace ArmISA
362
363#endif // __ARCH_ARM_TLB_HH__
403};
404
405} // namespace ArmISA
406
407#endif // __ARCH_ARM_TLB_HH__