tlb.hh (10822:d259f2bc2b31) | tlb.hh (10854:f449d6f8a647) |
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1/* 2 * Copyright (c) 2010-2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 298 unchanged lines hidden (view full) --- 307 */ 308 virtual BaseMasterPort* getMasterPort(); 309 310 // Caching misc register values here. 311 // Writing to misc registers needs to invalidate them. 312 // translateFunctional/translateSe/translateFs checks if they are 313 // invalid and call updateMiscReg if necessary. 314protected: | 1/* 2 * Copyright (c) 2010-2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 298 unchanged lines hidden (view full) --- 307 */ 308 virtual BaseMasterPort* getMasterPort(); 309 310 // Caching misc register values here. 311 // Writing to misc registers needs to invalidate them. 312 // translateFunctional/translateSe/translateFs checks if they are 313 // invalid and call updateMiscReg if necessary. 314protected: |
315 CPSR cpsr; |
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315 bool aarch64; 316 ExceptionLevel aarch64EL; 317 SCTLR sctlr; 318 SCR scr; 319 bool isPriv; 320 bool isSecure; 321 bool isHyp; 322 TTBCR ttbcr; --- 42 unchanged lines hidden --- | 316 bool aarch64; 317 ExceptionLevel aarch64EL; 318 SCTLR sctlr; 319 SCR scr; 320 bool isPriv; 321 bool isSecure; 322 bool isHyp; 323 TTBCR ttbcr; --- 42 unchanged lines hidden --- |