tlb.hh (10194:e6d2e8083d9c) tlb.hh (10463:25c5da51bbe0)
1/*
2 * Copyright (c) 2010-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 39 unchanged lines hidden (view full) ---

48#include "arch/arm/pagetable.hh"
49#include "arch/arm/utility.hh"
50#include "arch/arm/vtophys.hh"
51#include "base/statistics.hh"
52#include "dev/dma_device.hh"
53#include "mem/request.hh"
54#include "params/ArmTLB.hh"
55#include "sim/fault_fwd.hh"
1/*
2 * Copyright (c) 2010-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 39 unchanged lines hidden (view full) ---

48#include "arch/arm/pagetable.hh"
49#include "arch/arm/utility.hh"
50#include "arch/arm/vtophys.hh"
51#include "base/statistics.hh"
52#include "dev/dma_device.hh"
53#include "mem/request.hh"
54#include "params/ArmTLB.hh"
55#include "sim/fault_fwd.hh"
56#include "sim/probe/pmu.hh"
56#include "sim/tlb.hh"
57
58class ThreadContext;
59
60namespace ArmISA {
61
62class TableWalker;
63class Stage2LookUp;

--- 62 unchanged lines hidden (view full) ---

126
127 Stats::Formula readAccesses;
128 Stats::Formula writeAccesses;
129 Stats::Formula instAccesses;
130 Stats::Formula hits;
131 Stats::Formula misses;
132 Stats::Formula accesses;
133
57#include "sim/tlb.hh"
58
59class ThreadContext;
60
61namespace ArmISA {
62
63class TableWalker;
64class Stage2LookUp;

--- 62 unchanged lines hidden (view full) ---

127
128 Stats::Formula readAccesses;
129 Stats::Formula writeAccesses;
130 Stats::Formula instAccesses;
131 Stats::Formula hits;
132 Stats::Formula misses;
133 Stats::Formula accesses;
134
135 /** PMU probe for TLB refills */
136 ProbePoints::PMUUPtr ppRefills;
137
134 int rangeMRU; //On lookup, only move entries ahead when outside rangeMRU
135
136 bool bootUncacheability;
137
138 public:
139 TLB(const ArmTLBParams *p);
140 TLB(const Params *p, int _size, TableWalker *_walker);
141

--- 144 unchanged lines hidden (view full) ---

286 void drainResume();
287
288 // Checkpointing
289 void serialize(std::ostream &os);
290 void unserialize(Checkpoint *cp, const std::string &section);
291
292 void regStats();
293
138 int rangeMRU; //On lookup, only move entries ahead when outside rangeMRU
139
140 bool bootUncacheability;
141
142 public:
143 TLB(const ArmTLBParams *p);
144 TLB(const Params *p, int _size, TableWalker *_walker);
145

--- 144 unchanged lines hidden (view full) ---

290 void drainResume();
291
292 // Checkpointing
293 void serialize(std::ostream &os);
294 void unserialize(Checkpoint *cp, const std::string &section);
295
296 void regStats();
297
298 void regProbePoints() M5_ATTR_OVERRIDE;
299
294 /**
295 * Get the table walker master port. This is used for migrating
296 * port connections during a CPU takeOverFrom() call. For
297 * architectures that do not have a table walker, NULL is
298 * returned, hence the use of a pointer rather than a
299 * reference. For ARM this method will always return a valid port
300 * pointer.
301 *

--- 68 unchanged lines hidden --- 		300 /**
301 * Get the table walker master port. This is used for migrating
302 * port connections during a CPU takeOverFrom() call. For
303 * architectures that do not have a table walker, NULL is
304 * returned, hence the use of a pointer rather than a
305 * reference. For ARM this method will always return a valid port
306 * pointer.
307 *

--- 68 unchanged lines hidden ---