1a2,13
> * Copyright (c) 2010 ARM Limited
> * All rights reserved
> *
> * The license below extends only to copyright in the software and shall
> * not be construed as granting a license to any other intellectual
> * property including but not limited to intellectual property relating
> * to a hardware implementation of the functionality of the software
> * licensed hereunder. You may use the software subject to the license
> * terms below provided that you ensure that this notice is replicated
> * unmodified and in its entirety in all distributions of the software,
> * modified or unmodified, in source code or in binary form.
> *
3,4d14
< * Copyright (c) 2007 MIPS Technologies, Inc.
< * Copyright (c) 2007-2008 The Florida State University
30,32c40
< * Authors: Nathan Binkert
< * Steve Reinhardt
< * Stephen Hines
---
> * Authors: Ali Saidi
52,54d59
< /* ARM does not distinguish between a DTLB and an ITLB -> unified TLB
< However, to maintain compatibility with other architectures, we'll
< simply create an ITLB and DTLB that will point to the real TLB */
57,86d61
< // WARN: This particular TLB entry is not necessarily conformed to ARM ISA
< struct TlbEntry
< {
< Addr _pageStart;
< TlbEntry() {}
< TlbEntry(Addr asn, Addr vaddr, Addr paddr) : _pageStart(paddr) {}
<
< void
< updateVaddr(Addr new_vaddr)
< {
< panic("unimplemented");
< }
<
< Addr pageStart()
< {
< return _pageStart;
< }
<
< void serialize(std::ostream &os)
< {
< SERIALIZE_SCALAR(_pageStart);
< }
<
< void unserialize(Checkpoint *cp, const std::string &section)
< {
< UNSERIALIZE_SCALAR(_pageStart);
< }
<
< };
<
114a90
> // Access Stats
132,133d107
< int probeEntry(Addr vpn,uint8_t) const;
< ArmISA::PTE *getEntry(unsigned) const;
135d108
< int smallPages;
138d110
< ArmISA::PTE &index(bool advance = true);
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< void insertAt(ArmISA::PTE &pte, unsigned Index, int _smallPages);
147d117
< // static helper functions... really
150,151d119
< static Fault checkCacheability(RequestPtr &req);
<