tlb.cc (7093:9832d4b070fc) tlb.cc (7294:fda2c00880db)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 277 unchanged lines hidden (view full) ---

286 misses = read_misses + write_misses;
287 accesses = read_accesses + write_accesses;
288}
289
290Fault
291TLB::translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode)
292{
293 Addr vaddr = req->getVaddr() & ~PcModeMask;
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 277 unchanged lines hidden (view full) ---

286 misses = read_misses + write_misses;
287 accesses = read_accesses + write_accesses;
288}
289
290Fault
291TLB::translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode)
292{
293 Addr vaddr = req->getVaddr() & ~PcModeMask;
294 SCTLR sctlr = tc->readMiscReg(MISCREG_SCTLR);
295 uint32_t flags = req->getFlags();
296
297 if (mode != Execute) {
298 assert(flags & MustBeOne);
299
300 if (sctlr.a || (flags & AllowUnaligned) == 0) {
301 if ((vaddr & flags & AlignmentMask) != 0) {
302 return new DataAbort;
303 }
304 }
305 }
294#if !FULL_SYSTEM
295 Process * p = tc->getProcessPtr();
296
297 Addr paddr;
298 if (!p->pTable->translate(vaddr, paddr))
299 return Fault(new GenericPageTableFault(vaddr));
300 req->setPaddr(paddr);
301
302 return NoFault;
303#else
306#if !FULL_SYSTEM
307 Process * p = tc->getProcessPtr();
308
309 Addr paddr;
310 if (!p->pTable->translate(vaddr, paddr))
311 return Fault(new GenericPageTableFault(vaddr));
312 req->setPaddr(paddr);
313
314 return NoFault;
315#else
304 SCTLR sctlr = tc->readMiscReg(MISCREG_SCTLR);
305 if (!sctlr.m) {
306 req->setPaddr(vaddr);
307 return NoFault;
308 }
309 panic("MMU translation not implemented\n");
310 return NoFault;
311
312

--- 27 unchanged lines hidden --- 		316 if (!sctlr.m) {
317 req->setPaddr(vaddr);
318 return NoFault;
319 }
320 panic("MMU translation not implemented\n");
321 return NoFault;
322
323

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