tlb.cc (13784:1941dc118243) tlb.cc (13795:e21c61d9efb8)
1/*
2 * Copyright (c) 2010-2013, 2016-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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1241 translation->markDelayed();
1242 }
1243 return fault;
1244}
1245
1246Port *
1247TLB::getTableWalkerPort()
1248{
1/*
2 * Copyright (c) 2010-2013, 2016-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 1232 unchanged lines hidden (view full) ---

1241 translation->markDelayed();
1242 }
1243 return fault;
1244}
1245
1246Port *
1247TLB::getTableWalkerPort()
1248{
1249 return &stage2Mmu->getPort();
1249 return &stage2Mmu->getDMAPort();
1250}
1251
1252void
1253TLB::updateMiscReg(ThreadContext *tc, ArmTranslationType tranType)
1254{
1255 // check if the regs have changed, or the translation mode is different.
1256 // NOTE: the tran type doesn't affect stage 2 TLB's as they only handle
1257 // one type of translation anyway

--- 328 unchanged lines hidden --- 		1250}
1251
1252void
1253TLB::updateMiscReg(ThreadContext *tc, ArmTranslationType tranType)
1254{
1255 // check if the regs have changed, or the translation mode is different.
1256 // NOTE: the tran type doesn't affect stage 2 TLB's as they only handle
1257 // one type of translation anyway

--- 328 unchanged lines hidden ---