tlb.cc (12749:223c83ed9979) tlb.cc (12763:37c243ed1112)
1/*
2 * Copyright (c) 2010-2013, 2016-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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1140 }
1141
1142 // Check for a trickbox generated address fault
1143 if (fault == NoFault)
1144 fault = testTranslation(req, mode, te->domain);
1145 }
1146
1147 if (fault == NoFault) {
1/*
2 * Copyright (c) 2010-2013, 2016-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 1131 unchanged lines hidden (view full) ---

1140 }
1141
1142 // Check for a trickbox generated address fault
1143 if (fault == NoFault)
1144 fault = testTranslation(req, mode, te->domain);
1145 }
1146
1147 if (fault == NoFault) {
1148 // Generate Illegal Inst Set State fault if IL bit is set in CPSR
1149 if (aarch64 && is_fetch && cpsr.il == 1) {
1150 return std::make_shared<IllegalInstSetStateFault>();
1151 }
1152
1153 // Don't try to finalize a physical address unless the
1154 // translation has completed (i.e., there is a table entry).
1155 return te ? finalizePhysical(req, tc, mode) : NoFault;
1156 } else {
1157 return fault;
1158 }
1159}
1160

--- 422 unchanged lines hidden --- 		1148 // Don't try to finalize a physical address unless the
1149 // translation has completed (i.e., there is a table entry).
1150 return te ? finalizePhysical(req, tc, mode) : NoFault;
1151 } else {
1152 return fault;
1153 }
1154}
1155

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