1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 432 unchanged lines hidden (view full) --- 441{ 442 return NoFault; 443} 444 445Fault 446TLB::translateFs(RequestPtr req, ThreadContext *tc, Mode mode, 447 Translation *translation, bool &delay, bool timing) 448{ |
449 if (!miscRegValid) { |
450 updateMiscReg(tc); |
451 DPRINTF(TLBVerbose, "TLB variables changed!\n"); 452 } |
453 454 Addr vaddr = req->getVaddr(); 455 uint32_t flags = req->getFlags(); 456 457 bool is_fetch = (mode == Execute); 458 bool is_write = (mode == Write); 459 bool is_priv = isPriv && !(flags & UserMode); 460 |
461 DPRINTF(TLBVerbose, "CPSR is priv:%d UserMode:%d\n", |
462 isPriv, flags & UserMode); 463 // If this is a clrex instruction, provide a PA of 0 with no fault 464 // This will force the monitor to set the tracked address to 0 465 // a bit of a hack but this effectively clrears this processors monitor 466 if (flags & Request::CLEAR_LL){ 467 req->setPaddr(0); 468 req->setFlags(Request::UNCACHEABLE); 469 req->setFlags(Request::CLEAR_LL); --- 255 unchanged lines hidden --- |