1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 542 unchanged lines hidden (view full) --- 551 } 552 553 // Set memory attributes 554 DPRINTF(TLBVerbose, 555 "Setting memory attributes: shareable: %d, innerAttrs: %d, \ 556 outerAttrs: %d\n", 557 te->shareable, te->innerAttrs, te->outerAttrs); 558 setAttr(te->attributes); |
559 if (te->nonCacheable) { |
560 req->setFlags(Request::UNCACHEABLE); 561 |
562 // Prevent prefetching from I/O devices. 563 if (req->isPrefetch()) { 564 return new PrefetchAbort(vaddr, ArmFault::PrefetchUncacheable); 565 } 566 } 567 |
568 switch ( (dacr >> (te->domain * 2)) & 0x3) { 569 case 0: 570 domainFaults++; 571 DPRINTF(TLB, "TLB Fault: Data abort on domain. DACR: %#x domain: %#x" 572 " write:%d sNp:%d\n", dacr, te->domain, is_write, te->sNp); 573 if (is_fetch) 574 return new PrefetchAbort(vaddr, 575 (te->sNp ? ArmFault::Domain0 : ArmFault::Domain1)); --- 143 unchanged lines hidden --- |