1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * Copyright (c) 2007 MIPS Technologies, Inc. 4 * Copyright (c) 2007-2008 The Florida State University 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are --- 22 unchanged lines hidden (view full) --- 31 * Steve Reinhardt 32 * Jaidev Patwardhan 33 * Stephen Hines 34 */ 35 36#include <string> 37#include <vector> 38 |
39#include "arch/arm/faults.hh" |
40#include "arch/arm/pagetable.hh" 41#include "arch/arm/tlb.hh" |
42#include "arch/arm/utility.hh" 43#include "base/inifile.hh" 44#include "base/str.hh" 45#include "base/trace.hh" 46#include "cpu/thread_context.hh" |
47#include "mem/page_table.hh" |
48#include "params/ArmTLB.hh" |
49#include "sim/process.hh" |
50 51 52using namespace std; 53using namespace ArmISA; 54 55/////////////////////////////////////////////////////////////////////// 56// 57// ARM TLB --- 213 unchanged lines hidden (view full) --- 271 ; 272 273 hits = read_hits + write_hits; 274 misses = read_misses + write_misses; 275 accesses = read_accesses + write_accesses; 276} 277 278Fault |
279TLB::translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode) |
280{ 281#if !FULL_SYSTEM 282 Process * p = tc->getProcessPtr(); 283 284 Fault fault = p->pTable->translate(req); 285 if(fault != NoFault) 286 return fault; 287 288 return NoFault; 289#else |
290 fatal("translate atomic not yet implemented\n"); |
291#endif 292} 293 294void |
295TLB::translateTiming(RequestPtr req, ThreadContext *tc, 296 Translation *translation, Mode mode) |
297{ 298 assert(translation); |
299 translation->finish(translateAtomic(req, tc, mode), req, tc, mode); |
300} 301 |
302ArmISA::PTE & 303TLB::index(bool advance) 304{ 305 ArmISA::PTE *pte = &table[nlu]; 306 307 if (advance) 308 nextnlu(); 309 310 return *pte; 311} 312 |
313ArmISA::TLB * 314ArmTLBParams::create() |
315{ |
316 return new ArmISA::TLB(this); |
317} |