1/* 2 * Copyright (c) 2010-2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 183 unchanged lines hidden (view full) --- 192 193 //inserting to MRU position and evicting the LRU one 194 195 for (int i = size - 1; i > 0; --i) 196 table[i] = table[i-1]; 197 table[0] = entry; 198 199 inserts++; |
200 ppRefills->notify(1); |
201} 202 203void 204TLB::printTlb() const 205{ 206 int x = 0; 207 TlbEntry *te; 208 DPRINTF(TLB, "Current TLB contents:\n"); --- 318 unchanged lines hidden (view full) --- 527 instAccesses = instHits + instMisses; 528 readAccesses = readHits + readMisses; 529 writeAccesses = writeHits + writeMisses; 530 hits = readHits + writeHits + instHits; 531 misses = readMisses + writeMisses + instMisses; 532 accesses = readAccesses + writeAccesses + instAccesses; 533} 534 |
535void 536TLB::regProbePoints() 537{ 538 ppRefills.reset(new ProbePoints::PMU(getProbeManager(), "Refills")); 539} 540 |
541Fault 542TLB::translateSe(RequestPtr req, ThreadContext *tc, Mode mode, 543 Translation *translation, bool &delay, bool timing) 544{ 545 updateMiscReg(tc); 546 Addr vaddr_tainted = req->getVaddr(); 547 Addr vaddr = 0; 548 if (aarch64) --- 881 unchanged lines hidden --- |