63a64
> #include "arch/arm/system.hh"
75c76
< , rangeMRU(1), miscRegValid(false)
---
> , rangeMRU(1), bootUncacheability(false), miscRegValid(false)
577a579,583
>
> if (!bootUncacheability &&
> ((ArmSystem*)tc->getSystemPtr())->adderBootUncacheable(vaddr))
> req->setFlags(Request::UNCACHEABLE);
>
707c713
< DPRINTF(TLB, "Translation returning delay=%d fault=%d\n", delay, fault !=
---
> DPRINTF(TLBVerbose, "Translation returning delay=%d fault=%d\n", delay, fault !=