tlb.cc (6757:d86d3d6e5326) | tlb.cc (7093:9832d4b070fc) |
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1/* | 1/* |
2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * |
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2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * Copyright (c) 2007 MIPS Technologies, Inc. 4 * Copyright (c) 2007-2008 The Florida State University 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are 9 * met: redistributions of source code must retain the above copyright --- 263 unchanged lines hidden (view full) --- 273 hits = read_hits + write_hits; 274 misses = read_misses + write_misses; 275 accesses = read_accesses + write_accesses; 276} 277 278Fault 279TLB::translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode) 280{ | 14 * Copyright (c) 2001-2005 The Regents of The University of Michigan 15 * Copyright (c) 2007 MIPS Technologies, Inc. 16 * Copyright (c) 2007-2008 The Florida State University 17 * All rights reserved. 18 * 19 * Redistribution and use in source and binary forms, with or without 20 * modification, are permitted provided that the following conditions are 21 * met: redistributions of source code must retain the above copyright --- 263 unchanged lines hidden (view full) --- 285 hits = read_hits + write_hits; 286 misses = read_misses + write_misses; 287 accesses = read_accesses + write_accesses; 288} 289 290Fault 291TLB::translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode) 292{ |
293 Addr vaddr = req->getVaddr() & ~PcModeMask; |
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281#if !FULL_SYSTEM 282 Process * p = tc->getProcessPtr(); 283 | 294#if !FULL_SYSTEM 295 Process * p = tc->getProcessPtr(); 296 |
284 Fault fault = p->pTable->translate(req); 285 if(fault != NoFault) 286 return fault; | 297 Addr paddr; 298 if (!p->pTable->translate(vaddr, paddr)) 299 return Fault(new GenericPageTableFault(vaddr)); 300 req->setPaddr(paddr); |
287 288 return NoFault; 289#else 290 SCTLR sctlr = tc->readMiscReg(MISCREG_SCTLR); 291 if (!sctlr.m) { | 301 302 return NoFault; 303#else 304 SCTLR sctlr = tc->readMiscReg(MISCREG_SCTLR); 305 if (!sctlr.m) { |
292 req->setPaddr(req->getVaddr()); | 306 req->setPaddr(vaddr); |
293 return NoFault; 294 } 295 panic("MMU translation not implemented\n"); 296 return NoFault; 297 298 299#endif 300} --- 25 unchanged lines hidden --- | 307 return NoFault; 308 } 309 panic("MMU translation not implemented\n"); 310 return NoFault; 311 312 313#endif 314} --- 25 unchanged lines hidden --- |