tlb.cc (13882:03fe9a85b435) | tlb.cc (13889:b329d40d4e78) |
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1/* 2 * Copyright (c) 2010-2013, 2016-2019 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 1294 unchanged lines hidden (view full) --- 1303 asid = -1; 1304 break; 1305 } 1306 hcr = tc->readMiscReg(MISCREG_HCR_EL2); 1307 scr = tc->readMiscReg(MISCREG_SCR_EL3); 1308 isPriv = aarch64EL != EL0; 1309 if (haveVirtualization) { 1310 vmid = bits(tc->readMiscReg(MISCREG_VTTBR_EL2), 55, 48); | 1/* 2 * Copyright (c) 2010-2013, 2016-2019 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 1294 unchanged lines hidden (view full) --- 1303 asid = -1; 1304 break; 1305 } 1306 hcr = tc->readMiscReg(MISCREG_HCR_EL2); 1307 scr = tc->readMiscReg(MISCREG_SCR_EL3); 1308 isPriv = aarch64EL != EL0; 1309 if (haveVirtualization) { 1310 vmid = bits(tc->readMiscReg(MISCREG_VTTBR_EL2), 55, 48); |
1311 isHyp = tranType & HypMode; | 1311 isHyp = aarch64EL == EL2; 1312 isHyp |= tranType & HypMode; |
1312 isHyp &= (tranType & S1S2NsTran) == 0; 1313 isHyp &= (tranType & S1CTran) == 0; 1314 // Work out if we should skip the first stage of translation and go 1315 // directly to stage 2. This value is cached so we don't have to 1316 // compute it for every translation. 1317 stage2Req = isStage2 || 1318 (hcr.vm && !isHyp && !isSecure && 1319 !(tranType & S1CTran) && (aarch64EL < EL2) && --- 271 unchanged lines hidden --- | 1313 isHyp &= (tranType & S1S2NsTran) == 0; 1314 isHyp &= (tranType & S1CTran) == 0; 1315 // Work out if we should skip the first stage of translation and go 1316 // directly to stage 2. This value is cached so we don't have to 1317 // compute it for every translation. 1318 stage2Req = isStage2 || 1319 (hcr.vm && !isHyp && !isSecure && 1320 !(tranType & S1CTran) && (aarch64EL < EL2) && --- 271 unchanged lines hidden --- |