1/* 2 * Copyright (c) 2010-2016 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 880 unchanged lines hidden (view full) --- 889 DrainState drain() override; 890 void drainResume() override; 891 892 BaseMasterPort& getMasterPort(const std::string &if_name, 893 PortID idx = InvalidPortID) override; 894 895 void regStats() override; 896 |
897 Fault walk(const RequestPtr &req, ThreadContext *tc, 898 uint16_t asid, uint8_t _vmid, |
899 bool _isHyp, TLB::Mode mode, TLB::Translation *_trans, 900 bool timing, bool functional, bool secure, 901 TLB::ArmTranslationType tranType, bool _stage2Req); 902 903 void setTlb(TLB *_tlb) { tlb = _tlb; } 904 TLB* getTlb() { return tlb; } 905 void setMMU(Stage2MMU *m, MasterID master_id); 906 void memAttrs(ThreadContext *tc, TlbEntry &te, SCTLR sctlr, --- 62 unchanged lines hidden --- |