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< * Copyright (c) 2010-2014 ARM Limited
---
> * Copyright (c) 2010-2015 ARM Limited
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< #include "mem/mem_object.hh"
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< /**
< * A snooping DMA port that currently does nothing besides
< * extending the DMA port to accept snoops without complaining.
< */
< class SnoopingDmaPort : public DmaPort
< {
<
< protected:
<
< virtual void recvTimingSnoopReq(PacketPtr pkt)
< { }
<
< virtual Tick recvAtomicSnoop(PacketPtr pkt)
< { return 0; }
<
< virtual void recvFunctionalSnoop(PacketPtr pkt)
< { }
<
< virtual bool isSnooping() const { return true; }
<
< public:
<
< /**
< * A snooping DMA port merely calls the construtor of the DMA
< * port.
< */
< SnoopingDmaPort(MemObject *dev, System *s) :
< DmaPort(dev, s)
< { }
< };
<
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<
< /** Port to issue translation requests from */
< SnoopingDmaPort port;
<
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> /** Port shared by the two table walkers. */
> DmaPort* port;
>
> /** Master id assigned by the MMU. */
> MasterID masterId;
>
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< /** Request id for requests generated by this walker */
< MasterID masterId;
<
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< ArmSystem *armSys;
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> virtual void init();
>
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>
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>
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< /**
< * Allow the MMU (overseeing both stage 1 and stage 2 TLBs) to
< * access the table walker port through the TLB so that it can
< * orchestrate staged translations.
< *
< * @return Our DMA port
< */
< DmaPort& getWalkerPort() { return port; }
<
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< void setMMU(Stage2MMU *m) { stage2Mmu = m; }
---
> void setMMU(Stage2MMU *m, MasterID master_id);