1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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289 bool isWrite;
290
291 /** If the access is a fetch (for execution, and no-exec) must be checked?*/
292 bool isFetch;
293
294 /** If the mode is timing or atomic */
295 bool timing;
296
297 /** If the atomic mode should be functional */
298 bool functional;
299
300 /** Save mode for use in delayed response */
301 BaseTLB::Mode mode;
302
303 L1Descriptor l1Desc;
304 L2Descriptor l2Desc;
305
306 /** Whether L1/L2 descriptor response is delayed in timing mode */
307 bool delayed;

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352 return dynamic_cast<const Params *>(_params);
353 }
354
355 virtual unsigned int drain(Event *de);
356 virtual void resume();
357 virtual Port *getPort(const std::string &if_name, int idx = -1);
358
359 Fault walk(RequestPtr req, ThreadContext *tc, uint8_t cid, TLB::Mode mode,
360 TLB::Translation *_trans, bool timing, bool functional = false);
361
362 void setTlb(TLB *_tlb) { tlb = _tlb; }
363 void memAttrs(ThreadContext *tc, TlbEntry &te, SCTLR sctlr,
364 uint8_t texcb, bool s);
365
366 private:
367
368 void doL1Descriptor();

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