table_walker.cc (9015:7f4d25789dc4) | table_walker.cc (9152:86c0e6ca5e7c) |
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1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 29 unchanged lines hidden (view full) --- 38 */ 39 40#include "arch/arm/faults.hh" 41#include "arch/arm/table_walker.hh" 42#include "arch/arm/tlb.hh" 43#include "cpu/base.hh" 44#include "cpu/thread_context.hh" 45#include "debug/Checkpoint.hh" | 1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 29 unchanged lines hidden (view full) --- 38 */ 39 40#include "arch/arm/faults.hh" 41#include "arch/arm/table_walker.hh" 42#include "arch/arm/tlb.hh" 43#include "cpu/base.hh" 44#include "cpu/thread_context.hh" 45#include "debug/Checkpoint.hh" |
46#include "debug/Drain.hh" |
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46#include "debug/TLB.hh" 47#include "debug/TLBVerbose.hh" 48#include "sim/system.hh" 49 50using namespace ArmISA; 51 52TableWalker::TableWalker(const Params *p) 53 : MemObject(p), port(this, params()->sys, params()->min_backoff, | 47#include "debug/TLB.hh" 48#include "debug/TLBVerbose.hh" 49#include "sim/system.hh" 50 51using namespace ArmISA; 52 53TableWalker::TableWalker(const Params *p) 54 : MemObject(p), port(this, params()->sys, params()->min_backoff, |
54 params()->max_backoff), | 55 params()->max_backoff), drainEvent(NULL), |
55 tlb(NULL), currState(NULL), pending(false), 56 masterId(p->sys->getMasterId(name())), 57 doL1DescEvent(this), doL2DescEvent(this), doProcessEvent(this) 58{ 59 sctlr = 0; 60} 61 62TableWalker::~TableWalker() 63{ 64 ; 65} 66 | 56 tlb(NULL), currState(NULL), pending(false), 57 masterId(p->sys->getMasterId(name())), 58 doL1DescEvent(this), doL2DescEvent(this), doProcessEvent(this) 59{ 60 sctlr = 0; 61} 62 63TableWalker::~TableWalker() 64{ 65 ; 66} 67 |
68void 69TableWalker::completeDrain() 70{ 71 if (drainEvent && stateQueueL1.empty() && stateQueueL2.empty() && 72 pendingQueue.empty()) { 73 changeState(Drained); 74 DPRINTF(Drain, "TableWalker done draining, processing drain event\n"); 75 drainEvent->process(); 76 drainEvent = NULL; 77 } 78} 79 |
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67unsigned int 68TableWalker::drain(Event *de) 69{ | 80unsigned int 81TableWalker::drain(Event *de) 82{ |
70 if (stateQueueL1.size() || stateQueueL2.size() || pendingQueue.size()) 71 { | 83 unsigned int count = port.drain(de); 84 85 if (stateQueueL1.empty() && stateQueueL2.empty() && 86 pendingQueue.empty()) { 87 changeState(Drained); 88 DPRINTF(Drain, "TableWalker free, no need to drain\n"); 89 90 // table walker is drained, but its ports may still need to be drained 91 return count; 92 } else { 93 drainEvent = de; |
72 changeState(Draining); | 94 changeState(Draining); |
73 DPRINTF(Checkpoint, "TableWalker busy, wait to drain\n"); 74 return 1; | 95 DPRINTF(Drain, "TableWalker not drained\n"); 96 97 // return port drain count plus the table walker itself needs to drain 98 return count + 1; 99 |
75 } | 100 } |
76 else 77 { 78 changeState(Drained); 79 DPRINTF(Checkpoint, "TableWalker free, no need to drain\n"); 80 return 0; 81 } | |
82} 83 84void 85TableWalker::resume() 86{ 87 MemObject::resume(); 88 if ((params()->sys->getMemoryMode() == Enums::timing) && currState) { | 101} 102 103void 104TableWalker::resume() 105{ 106 MemObject::resume(); 107 if ((params()->sys->getMemoryMode() == Enums::timing) && currState) { |
89 delete currState; 90 currState = NULL; | 108 delete currState; 109 currState = NULL; |
91 } 92} 93 94MasterPort& 95TableWalker::getMasterPort(const std::string &if_name, int idx) 96{ 97 if (if_name == "port") { 98 return port; --- 563 unchanged lines hidden (view full) --- 662 663 DPRINTF(TLBVerbose, "L1 Desc object host addr: %p\n",&currState->l1Desc.data); 664 DPRINTF(TLBVerbose, "L1 Desc object data: %08x\n",currState->l1Desc.data); 665 666 DPRINTF(TLBVerbose, "calling doL1Descriptor for vaddr:%#x\n", currState->vaddr); 667 doL1Descriptor(); 668 669 stateQueueL1.pop_front(); | 110 } 111} 112 113MasterPort& 114TableWalker::getMasterPort(const std::string &if_name, int idx) 115{ 116 if (if_name == "port") { 117 return port; --- 563 unchanged lines hidden (view full) --- 681 682 DPRINTF(TLBVerbose, "L1 Desc object host addr: %p\n",&currState->l1Desc.data); 683 DPRINTF(TLBVerbose, "L1 Desc object data: %08x\n",currState->l1Desc.data); 684 685 DPRINTF(TLBVerbose, "calling doL1Descriptor for vaddr:%#x\n", currState->vaddr); 686 doL1Descriptor(); 687 688 stateQueueL1.pop_front(); |
689 completeDrain(); |
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670 // Check if fault was generated 671 if (currState->fault != NoFault) { 672 currState->transState->finish(currState->fault, currState->req, 673 currState->tc, currState->mode); 674 675 pending = false; 676 nextWalk(currState->tc); 677 --- 40 unchanged lines hidden (view full) --- 718 else { 719 DPRINTF(TLBVerbose, "calling translateTiming again\n"); 720 currState->fault = tlb->translateTiming(currState->req, currState->tc, 721 currState->transState, currState->mode); 722 } 723 724 725 stateQueueL2.pop_front(); | 690 // Check if fault was generated 691 if (currState->fault != NoFault) { 692 currState->transState->finish(currState->fault, currState->req, 693 currState->tc, currState->mode); 694 695 pending = false; 696 nextWalk(currState->tc); 697 --- 40 unchanged lines hidden (view full) --- 738 else { 739 DPRINTF(TLBVerbose, "calling translateTiming again\n"); 740 currState->fault = tlb->translateTiming(currState->req, currState->tc, 741 currState->transState, currState->mode); 742 } 743 744 745 stateQueueL2.pop_front(); |
746 completeDrain(); |
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726 pending = false; 727 nextWalk(currState->tc); 728 729 currState->req = NULL; 730 currState->tc = NULL; 731 currState->delayed = false; 732 733 delete currState; --- 18 unchanged lines hidden --- | 747 pending = false; 748 nextWalk(currState->tc); 749 750 currState->req = NULL; 751 currState->tc = NULL; 752 currState->delayed = false; 753 754 delete currState; --- 18 unchanged lines hidden --- |