table_walker.cc (8630:05580a8506c7) table_walker.cc (8733:64a7bf8fa56c)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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102 port = new DmaPort(this, sys, minb, maxb, true);
103 return port;
104 }
105 return NULL;
106}
107
108Fault
109TableWalker::walk(RequestPtr _req, ThreadContext *_tc, uint8_t _cid, TLB::Mode _mode,
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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102 port = new DmaPort(this, sys, minb, maxb, true);
103 return port;
104 }
105 return NULL;
106}
107
108Fault
109TableWalker::walk(RequestPtr _req, ThreadContext *_tc, uint8_t _cid, TLB::Mode _mode,
110 TLB::Translation *_trans, bool _timing)
110 TLB::Translation *_trans, bool _timing, bool _functional)
111{
111{
112 assert(!(_functional && _timing));
112 if (!currState) {
113 // For atomic mode, a new WalkerState instance should be only created
114 // once per TLB. For timing mode, a new instance is generated for every
115 // TLB miss.
116 DPRINTF(TLBVerbose, "creating new instance of WalkerState\n");
117
118 currState = new WalkerState();
119 currState->tableWalker = this;

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131 }
132
133 currState->tc = _tc;
134 currState->transState = _trans;
135 currState->req = _req;
136 currState->fault = NoFault;
137 currState->contextId = _cid;
138 currState->timing = _timing;
113 if (!currState) {
114 // For atomic mode, a new WalkerState instance should be only created
115 // once per TLB. For timing mode, a new instance is generated for every
116 // TLB miss.
117 DPRINTF(TLBVerbose, "creating new instance of WalkerState\n");
118
119 currState = new WalkerState();
120 currState->tableWalker = this;

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132 }
133
134 currState->tc = _tc;
135 currState->transState = _trans;
136 currState->req = _req;
137 currState->fault = NoFault;
138 currState->contextId = _cid;
139 currState->timing = _timing;
140 currState->functional = _functional;
139 currState->mode = _mode;
140
141 /** @todo These should be cached or grabbed from cached copies in
142 the TLB, all these miscreg reads are expensive */
143 currState->vaddr = currState->req->getVaddr();
144 currState->sctlr = currState->tc->readMiscReg(MISCREG_SCTLR);
145 sctlr = currState->sctlr;
146 currState->N = currState->tc->readMiscReg(MISCREG_TTBCR);

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225 if (currState->timing) {
226 port->dmaAction(MemCmd::ReadReq, l1desc_addr, sizeof(uint32_t),
227 &doL1DescEvent, (uint8_t*)&currState->l1Desc.data,
228 currState->tc->getCpuPtr()->ticks(1), flag);
229 DPRINTF(TLBVerbose, "Adding to walker fifo: queue size before adding: %d\n",
230 stateQueueL1.size());
231 stateQueueL1.push_back(currState);
232 currState = NULL;
141 currState->mode = _mode;
142
143 /** @todo These should be cached or grabbed from cached copies in
144 the TLB, all these miscreg reads are expensive */
145 currState->vaddr = currState->req->getVaddr();
146 currState->sctlr = currState->tc->readMiscReg(MISCREG_SCTLR);
147 sctlr = currState->sctlr;
148 currState->N = currState->tc->readMiscReg(MISCREG_TTBCR);

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227 if (currState->timing) {
228 port->dmaAction(MemCmd::ReadReq, l1desc_addr, sizeof(uint32_t),
229 &doL1DescEvent, (uint8_t*)&currState->l1Desc.data,
230 currState->tc->getCpuPtr()->ticks(1), flag);
231 DPRINTF(TLBVerbose, "Adding to walker fifo: queue size before adding: %d\n",
232 stateQueueL1.size());
233 stateQueueL1.push_back(currState);
234 currState = NULL;
233 } else {
235 } else if (!currState->functional) {
234 port->dmaAction(MemCmd::ReadReq, l1desc_addr, sizeof(uint32_t),
235 NULL, (uint8_t*)&currState->l1Desc.data,
236 currState->tc->getCpuPtr()->ticks(1), flag);
237 doL1Descriptor();
238 f = currState->fault;
236 port->dmaAction(MemCmd::ReadReq, l1desc_addr, sizeof(uint32_t),
237 NULL, (uint8_t*)&currState->l1Desc.data,
238 currState->tc->getCpuPtr()->ticks(1), flag);
239 doL1Descriptor();
240 f = currState->fault;
241 } else {
242 RequestPtr req = new Request(l1desc_addr, sizeof(uint32_t), flag);
243 PacketPtr pkt = new Packet(req, MemCmd::ReadReq, Packet::Broadcast);
244 pkt->dataStatic((uint8_t*)&currState->l1Desc.data);
245 port->sendFunctional(pkt);
246 doL1Descriptor();
247 delete req;
248 delete pkt;
249 f = currState->fault;
239 }
240
241 return f;
242}
243
244void
245TableWalker::memAttrs(ThreadContext *tc, TlbEntry &te, SCTLR sctlr,
246 uint8_t texcb, bool s)

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561 }
562
563
564 if (currState->timing) {
565 currState->delayed = true;
566 port->dmaAction(MemCmd::ReadReq, l2desc_addr, sizeof(uint32_t),
567 &doL2DescEvent, (uint8_t*)&currState->l2Desc.data,
568 currState->tc->getCpuPtr()->ticks(1));
250 }
251
252 return f;
253}
254
255void
256TableWalker::memAttrs(ThreadContext *tc, TlbEntry &te, SCTLR sctlr,
257 uint8_t texcb, bool s)

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572 }
573
574
575 if (currState->timing) {
576 currState->delayed = true;
577 port->dmaAction(MemCmd::ReadReq, l2desc_addr, sizeof(uint32_t),
578 &doL2DescEvent, (uint8_t*)&currState->l2Desc.data,
579 currState->tc->getCpuPtr()->ticks(1));
569 } else {
580 } else if (!currState->functional) {
570 port->dmaAction(MemCmd::ReadReq, l2desc_addr, sizeof(uint32_t),
571 NULL, (uint8_t*)&currState->l2Desc.data,
572 currState->tc->getCpuPtr()->ticks(1));
573 doL2Descriptor();
581 port->dmaAction(MemCmd::ReadReq, l2desc_addr, sizeof(uint32_t),
582 NULL, (uint8_t*)&currState->l2Desc.data,
583 currState->tc->getCpuPtr()->ticks(1));
584 doL2Descriptor();
585 } else {
586 RequestPtr req = new Request(l2desc_addr, sizeof(uint32_t), 0);
587 PacketPtr pkt = new Packet(req, MemCmd::ReadReq, Packet::Broadcast);
588 pkt->dataStatic((uint8_t*)&currState->l2Desc.data);
589 port->sendFunctional(pkt);
590 doL2Descriptor();
591 delete req;
592 delete pkt;
574 }
575 return;
576 default:
577 panic("A new type in a 2 bit field?\n");
578 }
579}
580
581void

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594 return;
595 default:
596 panic("A new type in a 2 bit field?\n");
597 }
598}
599
600void

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