table_walker.cc (11395:032bc62120eb) table_walker.cc (11517:54230f1ebef2)
1/*
2 * Copyright (c) 2010, 2012-2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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215 ++statSquashedBefore;
216 return std::make_shared<ReExec>();
217 }
218 }
219 pendingChange();
220
221 currState->startTime = curTick();
222 currState->tc = _tc;
1/*
2 * Copyright (c) 2010, 2012-2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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215 ++statSquashedBefore;
216 return std::make_shared<ReExec>();
217 }
218 }
219 pendingChange();
220
221 currState->startTime = curTick();
222 currState->tc = _tc;
223 currState->aarch64 = opModeIs64(currOpMode(_tc));
223 // ARM DDI 0487A.f (ARMv8 ARM) pg J8-5672
224 // aarch32/translation/translation/AArch32.TranslateAddress dictates
225 // even AArch32 EL0 will use AArch64 translation if EL1 is in AArch64.
226 currState->aarch64 = opModeIs64(currOpMode(_tc)) ||
227 ((currEL(_tc) == EL0) && ELIs64(_tc, EL1));
224 currState->el = currEL(_tc);
225 currState->transState = _trans;
226 currState->req = _req;
227 currState->fault = NoFault;
228 currState->asid = _asid;
229 currState->vmid = _vmid;
230 currState->isHyp = _isHyp;
231 currState->timing = _timing;

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285 // We only do a second stage of translation if we're not secure, or in
286 // hyp mode, the second stage MMU is enabled, and this table walker
287 // instance is the first stage.
288 currState->doingStage2 = false;
289 // @todo: for now disable this in AArch64 (HCR is not set)
290 currState->stage2Req = !currState->aarch64 && currState->hcr.vm &&
291 !isStage2 && !currState->isSecure && !currState->isHyp;
292
228 currState->el = currEL(_tc);
229 currState->transState = _trans;
230 currState->req = _req;
231 currState->fault = NoFault;
232 currState->asid = _asid;
233 currState->vmid = _vmid;
234 currState->isHyp = _isHyp;
235 currState->timing = _timing;

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289 // We only do a second stage of translation if we're not secure, or in
290 // hyp mode, the second stage MMU is enabled, and this table walker
291 // instance is the first stage.
292 currState->doingStage2 = false;
293 // @todo: for now disable this in AArch64 (HCR is not set)
294 currState->stage2Req = !currState->aarch64 && currState->hcr.vm &&
295 !isStage2 && !currState->isSecure && !currState->isHyp;
296
293 bool long_desc_format = currState->aarch64 ||
294 (_haveLPAE && currState->ttbcr.eae) ||
295 _isHyp || isStage2;
297 bool long_desc_format = currState->aarch64 || _isHyp || isStage2 ||
298 longDescFormatInUse(currState->tc);
296
297 if (long_desc_format) {
298 // Helper variables used for hierarchical permissions
299 currState->secureLookup = currState->isSecure;
300 currState->rwTable = true;
301 currState->userTable = true;
302 currState->xnTable = false;
303 currState->pxnTable = false;

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372 // We've got a valid request, lets process it
373 pending = true;
374 pendingQueue.pop_front();
375 // Keep currState in case one of the processWalk... calls NULLs it
376 WalkerState *curr_state_copy = currState;
377 Fault f;
378 if (currState->aarch64)
379 f = processWalkAArch64();
299
300 if (long_desc_format) {
301 // Helper variables used for hierarchical permissions
302 currState->secureLookup = currState->isSecure;
303 currState->rwTable = true;
304 currState->userTable = true;
305 currState->xnTable = false;
306 currState->pxnTable = false;

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375 // We've got a valid request, lets process it
376 pending = true;
377 pendingQueue.pop_front();
378 // Keep currState in case one of the processWalk... calls NULLs it
379 WalkerState *curr_state_copy = currState;
380 Fault f;
381 if (currState->aarch64)
382 f = processWalkAArch64();
380 else if ((_haveLPAE && currState->ttbcr.eae) || currState->isHyp || isStage2)
383 else if (longDescFormatInUse(currState->tc) ||
384 currState->isHyp || isStage2)
381 f = processWalkLPAE();
382 else
383 f = processWalk();
384
385 if (f != NoFault) {
386 curr_state_copy->transState->finish(f, curr_state_copy->req,
387 curr_state_copy->tc, curr_state_copy->mode);
388

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560 ttbr = currState->tc->readMiscReg(MISCREG_VTTBR);
561 tsz = sext<4>(currState->vtcr.t0sz);
562 start_lookup_level = currState->vtcr.sl0 ? L1 : L2;
563 } else if (currState->isHyp) {
564 DPRINTF(TLB, " - Selecting HTTBR (long-desc.)\n");
565 ttbr = currState->tc->readMiscReg(MISCREG_HTTBR);
566 tsz = currState->htcr.t0sz;
567 } else {
385 f = processWalkLPAE();
386 else
387 f = processWalk();
388
389 if (f != NoFault) {
390 curr_state_copy->transState->finish(f, curr_state_copy->req,
391 curr_state_copy->tc, curr_state_copy->mode);
392

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564 ttbr = currState->tc->readMiscReg(MISCREG_VTTBR);
565 tsz = sext<4>(currState->vtcr.t0sz);
566 start_lookup_level = currState->vtcr.sl0 ? L1 : L2;
567 } else if (currState->isHyp) {
568 DPRINTF(TLB, " - Selecting HTTBR (long-desc.)\n");
569 ttbr = currState->tc->readMiscReg(MISCREG_HTTBR);
570 tsz = currState->htcr.t0sz;
571 } else {
568 assert(_haveLPAE && currState->ttbcr.eae);
572 assert(longDescFormatInUse(currState->tc));
569
570 // Determine boundaries of TTBR0/1 regions
571 if (currState->ttbcr.t0sz)
572 ttbr0_max = (1ULL << (32 - currState->ttbcr.t0sz)) - 1;
573 else if (currState->ttbcr.t1sz)
574 ttbr0_max = (1ULL << 32) -
575 (1ULL << (32 - currState->ttbcr.t1sz)) - 1;
576 else

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574 // Determine boundaries of TTBR0/1 regions
575 if (currState->ttbcr.t0sz)
576 ttbr0_max = (1ULL << (32 - currState->ttbcr.t0sz)) - 1;
577 else if (currState->ttbcr.t1sz)
578 ttbr0_max = (1ULL << 32) -
579 (1ULL << (32 - currState->ttbcr.t1sz)) - 1;
580 else

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