table_walker.cc (10367:bf52480abd01) table_walker.cc (10421:d469fdcd937e)
1/*
2 * Copyright (c) 2010, 2012-2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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1153 attr_1_0 == 2 ? 6 : 5;
1154 te.nonCacheable = (attr_3_2 == 1) || (attr_1_0 == 1);
1155 }
1156 } else {
1157 uint8_t attrIndx = lDescriptor.attrIndx();
1158
1159 // LPAE always uses remapping of memory attributes, irrespective of the
1160 // value of SCTLR.TRE
1/*
2 * Copyright (c) 2010, 2012-2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 1144 unchanged lines hidden (view full) ---

1153 attr_1_0 == 2 ? 6 : 5;
1154 te.nonCacheable = (attr_3_2 == 1) || (attr_1_0 == 1);
1155 }
1156 } else {
1157 uint8_t attrIndx = lDescriptor.attrIndx();
1158
1159 // LPAE always uses remapping of memory attributes, irrespective of the
1160 // value of SCTLR.TRE
1161 int reg = attrIndx & 0x4 ? MISCREG_MAIR1 : MISCREG_MAIR0;
1162 reg = flattenMiscRegNsBanked(reg, currState->tc, !currState->isSecure);
1163 uint32_t mair = currState->tc->readMiscReg(reg);
1161 MiscRegIndex reg = attrIndx & 0x4 ? MISCREG_MAIR1 : MISCREG_MAIR0;
1162 int reg_as_int = flattenMiscRegNsBanked(reg, currState->tc,
1163 !currState->isSecure);
1164 uint32_t mair = currState->tc->readMiscReg(reg_as_int);
1164 attr = (mair >> (8 * (attrIndx % 4))) & 0xff;
1165 uint8_t attr_7_4 = bits(attr, 7, 4);
1166 uint8_t attr_3_0 = bits(attr, 3, 0);
1167 DPRINTF(TLBVerbose, "memAttrsLPAE AttrIndx:%#x sh:%#x, attr %#x\n", attrIndx, sh, attr);
1168
1169 // Note: the memory subsystem only cares about the 'cacheable' memory
1170 // attribute. The other attributes are only used to fill the PAR register
1171 // accordingly to provide the illusion of full support

--- 817 unchanged lines hidden --- 		1165 attr = (mair >> (8 * (attrIndx % 4))) & 0xff;
1166 uint8_t attr_7_4 = bits(attr, 7, 4);
1167 uint8_t attr_3_0 = bits(attr, 3, 0);
1168 DPRINTF(TLBVerbose, "memAttrsLPAE AttrIndx:%#x sh:%#x, attr %#x\n", attrIndx, sh, attr);
1169
1170 // Note: the memory subsystem only cares about the 'cacheable' memory
1171 // attribute. The other attributes are only used to fill the PAR register
1172 // accordingly to provide the illusion of full support

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