1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 37 unchanged lines hidden (view full) --- 46#define NUM_WALKERS 2 // 2 should be enough to handle crossing page boundaries 47 48using namespace ArmISA; 49 50TableWalker::TableWalker(const Params *p) 51 : MemObject(p), stateQueue(NUM_WALKERS), port(NULL), tlb(NULL), 52 currState(NULL), doL1DescEvent(this), doL2DescEvent(this) 53{ |
54 sctlr = 0; |
55} 56 57TableWalker::~TableWalker() 58{ 59 ; 60} 61 62 --- 351 unchanged lines hidden (view full) --- 414 currState->req = NULL; 415 } 416 DPRINTF(TLB, "L1 Descriptor Reserved/Ignore, causing fault\n"); 417 if (currState->isFetch) 418 currState->fault = 419 new PrefetchAbort(currState->vaddr, ArmFault::Translation0); 420 else 421 currState->fault = |
422 new DataAbort(currState->vaddr, 0, currState->isWrite, |
423 ArmFault::Translation0); 424 return; 425 case L1Descriptor::Section: 426 if (currState->sctlr.afe && bits(currState->l1Desc.ap(), 0) == 0) { 427 /** @todo: check sctlr.ha (bit[17]) if Hardware Access Flag is 428 * enabled if set, do l1.Desc.setAp0() instead of generating 429 * AccessFlag0 430 */ --- 96 unchanged lines hidden (view full) --- 527 } 528 529 if (currState->sctlr.afe && bits(currState->l2Desc.ap(), 0) == 0) { 530 /** @todo: check sctlr.ha (bit[17]) if Hardware Access Flag is enabled 531 * if set, do l2.Desc.setAp0() instead of generating AccessFlag0 532 */ 533 534 currState->fault = |
535 new DataAbort(currState->vaddr, 0, currState->isWrite, |
536 ArmFault::AccessFlag1); 537 538 } 539 540 if (currState->l2Desc.large()) { 541 te.N = 16; 542 te.pfn = currState->l2Desc.pfn(); 543 } else { --- 92 unchanged lines hidden --- |