1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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36 *
37 * Authors: Ali Saidi
38 */
39
40#include "arch/arm/faults.hh"
41#include "arch/arm/table_walker.hh"
42#include "arch/arm/tlb.hh"
43#include "dev/io_device.hh"
44#include "cpu/thread_context.hh"
45
46using namespace ArmISA;
47
48TableWalker::TableWalker(const Params *p)
49 : MemObject(p), port(NULL), tlb(NULL),
50 currState(NULL), doL1DescEvent(this), doL2DescEvent(this)
51{
52 sctlr = 0;
53}
54
55TableWalker::~TableWalker()
56{
57 ;
58}

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110 currState->vaddr = currState->req->getVaddr();
111 currState->sctlr = currState->tc->readMiscReg(MISCREG_SCTLR);
112 sctlr = currState->sctlr;
113 currState->N = currState->tc->readMiscReg(MISCREG_TTBCR);
114
115 currState->isFetch = (currState->mode == TLB::Execute);
116 currState->isWrite = (currState->mode == TLB::Write);
117
118 Addr ttbr = 0;
119
120 // If translation isn't enabled, we shouldn't be here
121 assert(currState->sctlr.m);
122
123 DPRINTF(TLB, "Begining table walk for address %#x, TTBCR: %#x, bits:%#x\n",
124 currState->vaddr, currState->N, mbits(currState->vaddr, 31,
125 32-currState->N));

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141 // Trickbox address check
142 Fault f;
143 f = tlb->walkTrickBoxCheck(l1desc_addr, currState->vaddr, sizeof(uint32_t),
144 currState->isFetch, currState->isWrite, 0, true);
145 if (f) {
146 if (currState->timing) {
147 currState->transState->finish(f, currState->req,
148 currState->tc, currState->mode);
149 currState = NULL;
150 } else {
151 currState->tc = NULL;
152 currState->req = NULL;
153 }
154 return f;
155 }
156
157 if (currState->timing) {
158 port->dmaAction(MemCmd::ReadReq, l1desc_addr, sizeof(uint32_t),
159 &doL1DescEvent, (uint8_t*)&currState->l1Desc.data, (Tick)0);
160 DPRINTF(TLBVerbose, "Adding to walker fifo: queue size before adding: %d\n",
161 stateQueueL1.size());
162 stateQueueL1.push_back(currState);
163 currState = NULL;
164 } else {
165 Request::Flags flag = 0;
166 if (currState->sctlr.c == 0){
167 flag = Request::UNCACHEABLE;
168 }
169 port->dmaAction(MemCmd::ReadReq, l1desc_addr, sizeof(uint32_t),
170 NULL, (uint8_t*)&currState->l1Desc.data, (Tick)0, flag);
171 doL1Descriptor();
172 f = currState->fault;
173 }
174
175 return f;
176}
177
178void

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493 }
494 return;
495 }
496
497
498 if (currState->timing) {
499 currState->delayed = true;
500 port->dmaAction(MemCmd::ReadReq, l2desc_addr, sizeof(uint32_t),
501 &doL2DescEvent, (uint8_t*)&currState->l2Desc.data, 0);
502 } else {
503 port->dmaAction(MemCmd::ReadReq, l2desc_addr, sizeof(uint32_t),
504 NULL, (uint8_t*)&currState->l2Desc.data, 0);
505 doL2Descriptor();
506 }
507 return;
508 default:
509 panic("A new type in a 2 bit field?\n");
510 }
511}
512

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584 doL1Descriptor();
585
586 stateQueueL1.pop_front();
587 // Check if fault was generated
588 if (currState->fault != NoFault) {
589 currState->transState->finish(currState->fault, currState->req,
590 currState->tc, currState->mode);
591
592 currState->req = NULL;
593 currState->tc = NULL;
594 currState->delayed = false;
595
596 }
597 else if (!currState->delayed) {
598 // delay is not set so there is no L2 to do
599 DPRINTF(TLBVerbose, "calling translateTiming again\n");
600 currState->fault = tlb->translateTiming(currState->req, currState->tc,
601 currState->transState, currState->mode);
602
603 currState->req = NULL;
604 currState->tc = NULL;
605 currState->delayed = false;
606
607 delete currState;
608 } else {
609 // need to do L2 descriptor
610 stateQueueL2.push_back(currState);
611 }
612 currState = NULL;
613}
614

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628 currState->tc, currState->mode);
629 }
630 else {
631 DPRINTF(TLBVerbose, "calling translateTiming again\n");
632 currState->fault = tlb->translateTiming(currState->req, currState->tc,
633 currState->transState, currState->mode);
634 }
635
636 currState->req = NULL;
637 currState->tc = NULL;
638 currState->delayed = false;
639
640 stateQueueL2.pop_front();
641 delete currState;
642 currState = NULL;
643}
644
645ArmISA::TableWalker *
646ArmTableWalkerParams::create()
647{
648 return new ArmISA::TableWalker(this);
649}
650