1/*
2 * Copyright (c) 2010, 2012-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 1522 unchanged lines hidden (view full) ---

1531
1532 return;
1533 }
1534 default:
1535 panic("A new type in a 2 bit field?\n");
1536 }
1537}
1538
1539void
1540TableWalker::doLongDescriptor()
1541{
1542 if (currState->fault != NoFault) {
1543 return;
1544 }
1545
1546 currState->longDesc.data = htog(currState->longDesc.data,

--- 29 unchanged lines hidden (view full) ---

1576 if (!currState->timing) {
1577 currState->tc = NULL;
1578 currState->req = NULL;
1579 }
1580
1581 DPRINTF(TLB, "L%d descriptor Invalid, causing fault type %d\n",
1582 currState->longDesc.lookupLevel,
1583 ArmFault::TranslationLL + currState->longDesc.lookupLevel);
1584 if (currState->isFetch)
1585 currState->fault = std::make_shared<PrefetchAbort>(
1586 currState->vaddr_tainted,
1587 ArmFault::TranslationLL + currState->longDesc.lookupLevel,
1588 isStage2,
1589 ArmFault::LpaeTran);
1590 else
1591 currState->fault = std::make_shared<DataAbort>(
1592 currState->vaddr_tainted,
1593 TlbEntry::DomainType::NoAccess,
1594 currState->isWrite,
1595 ArmFault::TranslationLL + currState->longDesc.lookupLevel,
1596 isStage2,
1597 ArmFault::LpaeTran);
1598 return;
1599 case LongDescriptor::Block:
1600 case LongDescriptor::Page:
1601 {
1602 bool fault = false;
1603 bool aff = false;
1604 // Check for address size fault
1605 if (checkAddrSizeFaultAArch64(
1606 mbits(currState->longDesc.data, MaxPhysAddrRange - 1,
1607 currState->longDesc.offsetBits()),
1608 currState->physAddrRange)) {
1609 fault = true;
1610 DPRINTF(TLB, "L%d descriptor causing Address Size Fault\n",
1611 currState->longDesc.lookupLevel);
1612 // Check for access fault
1613 } else if (currState->longDesc.af() == 0) {
1614 fault = true;
1615 DPRINTF(TLB, "L%d descriptor causing Access Fault\n",
1616 currState->longDesc.lookupLevel);
1617 aff = true;
1618 }
1619 if (fault) {
1620 if (currState->isFetch)
1621 currState->fault = std::make_shared<PrefetchAbort>(
1622 currState->vaddr_tainted,
1623 (aff ? ArmFault::AccessFlagLL : ArmFault::AddressSizeLL) +
1624 currState->longDesc.lookupLevel,
1625 isStage2,
1626 ArmFault::LpaeTran);
1627 else
1628 currState->fault = std::make_shared<DataAbort>(
1629 currState->vaddr_tainted,
1630 TlbEntry::DomainType::NoAccess, currState->isWrite,
1631 (aff ? ArmFault::AccessFlagLL : ArmFault::AddressSizeLL) +
1632 currState->longDesc.lookupLevel,
1633 isStage2,
1634 ArmFault::LpaeTran);
1635 } else {
1636 insertTableEntry(currState->longDesc, true);
1637 }
1638 }
1639 return;
1640 case LongDescriptor::Table:
1641 {
1642 // Set hierarchical permission flags

--- 18 unchanged lines hidden (view full) ---

1661 next_desc_addr,
1662 currState->secureLookup ? "s" : "ns");
1663
1664 // Check for address size fault
1665 if (currState->aarch64 && checkAddrSizeFaultAArch64(
1666 next_desc_addr, currState->physAddrRange)) {
1667 DPRINTF(TLB, "L%d descriptor causing Address Size Fault\n",
1668 currState->longDesc.lookupLevel);
1669 if (currState->isFetch)
1670 currState->fault = std::make_shared<PrefetchAbort>(
1671 currState->vaddr_tainted,
1672 ArmFault::AddressSizeLL
1673 + currState->longDesc.lookupLevel,
1674 isStage2,
1675 ArmFault::LpaeTran);
1676 else
1677 currState->fault = std::make_shared<DataAbort>(
1678 currState->vaddr_tainted,
1679 TlbEntry::DomainType::NoAccess, currState->isWrite,
1680 ArmFault::AddressSizeLL
1681 + currState->longDesc.lookupLevel,
1682 isStage2,
1683 ArmFault::LpaeTran);
1684 return;
1685 }
1686
1687 // Trickbox address check
1688 currState->fault = testWalk(
1689 next_desc_addr, sizeof(uint64_t), TlbEntry::DomainType::Client,
1690 toLookupLevel(currState->longDesc.lookupLevel +1));
1691

--- 599 unchanged lines hidden ---