system.hh (13759:9941fca869a9) system.hh (14128:6ed23d07d0d1)
1/*
1/*
2 * Copyright (c) 2010, 2012-2013, 2015-2018 ARM Limited
2 * Copyright (c) 2010, 2012-2013, 2015-2019 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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125 /**
126 * True if SVE is implemented (ARMv8)
127 */
128 const bool _haveSVE;
129
130 /** SVE vector length at reset, in quadwords */
131 const unsigned _sveVL;
132
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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125 /**
126 * True if SVE is implemented (ARMv8)
127 */
128 const bool _haveSVE;
129
130 /** SVE vector length at reset, in quadwords */
131 const unsigned _sveVL;
132
133 /** True if Priviledge Access Never is implemented */
134 const unsigned _havePAN;
135
133 /**
134 * Range for memory-mapped m5 pseudo ops. The range will be
135 * invalid/empty if disabled.
136 */
137 const AddrRange _m5opRange;
138
139 /**
140 * True if the Semihosting interface is enabled.

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236 bool haveLargeAsid64() const { return _haveLargeAsid64; }
237
238 /** Returns true if SVE is implemented (ARMv8) */
239 bool haveSVE() const { return _haveSVE; }
240
241 /** Returns the SVE vector length at reset, in quadwords */
242 unsigned sveVL() const { return _sveVL; }
243
136 /**
137 * Range for memory-mapped m5 pseudo ops. The range will be
138 * invalid/empty if disabled.
139 */
140 const AddrRange _m5opRange;
141
142 /**
143 * True if the Semihosting interface is enabled.

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239 bool haveLargeAsid64() const { return _haveLargeAsid64; }
240
241 /** Returns true if SVE is implemented (ARMv8) */
242 bool haveSVE() const { return _haveSVE; }
243
244 /** Returns the SVE vector length at reset, in quadwords */
245 unsigned sveVL() const { return _sveVL; }
246
247 /** Returns true if Priviledge Access Never is implemented */
248 bool havePAN() const { return _havePAN; }
249
244 /** Returns the supported physical address range in bits if the highest
245 * implemented exception level is 64 bits (ARMv8) */
246 uint8_t physAddrRange64() const { return _physAddrRange64; }
247
248 /** Returns the supported physical address range in bits */
249 uint8_t physAddrRange() const
250 {
251 if (_highestELIs64)

--- 106 unchanged lines hidden --- 		250 /** Returns the supported physical address range in bits if the highest
251 * implemented exception level is 64 bits (ARMv8) */
252 uint8_t physAddrRange64() const { return _physAddrRange64; }
253
254 /** Returns the supported physical address range in bits */
255 uint8_t physAddrRange() const
256 {
257 if (_highestELIs64)

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