system.hh (12318:1402d90f344f) | system.hh (12531:3141027bd11a) |
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1/* | 1/* |
2 * Copyright (c) 2010, 2012-2013, 2015-2017 ARM Limited | 2 * Copyright (c) 2010, 2012-2013, 2015-2018 ARM Limited |
3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 106 unchanged lines hidden (view full) --- 117 const bool _haveLargeAsid64; 118 119 /** 120 * Range for memory-mapped m5 pseudo ops. The range will be 121 * invalid/empty if disabled. 122 */ 123 const AddrRange _m5opRange; 124 | 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 106 unchanged lines hidden (view full) --- 117 const bool _haveLargeAsid64; 118 119 /** 120 * Range for memory-mapped m5 pseudo ops. The range will be 121 * invalid/empty if disabled. 122 */ 123 const AddrRange _m5opRange; 124 |
125 /** 126 * True if the Semihosting interface is enabled. 127 */ 128 ArmSemihosting *const semihosting; 129 |
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125 protected: 126 /** 127 * Get a boot loader that matches the kernel. 128 * 129 * @param obj Kernel binary 130 * @return Pointer to boot loader ObjectFile or nullptr if there 131 * is no matching boot loader. 132 */ --- 90 unchanged lines hidden (view full) --- 223 } 224 225 /** 226 * Range used by memory-mapped m5 pseudo-ops if enabled. Returns 227 * an invalid/empty range if disabled. 228 */ 229 const AddrRange &m5opRange() const { return _m5opRange; } 230 | 130 protected: 131 /** 132 * Get a boot loader that matches the kernel. 133 * 134 * @param obj Kernel binary 135 * @return Pointer to boot loader ObjectFile or nullptr if there 136 * is no matching boot loader. 137 */ --- 90 unchanged lines hidden (view full) --- 228 } 229 230 /** 231 * Range used by memory-mapped m5 pseudo-ops if enabled. Returns 232 * an invalid/empty range if disabled. 233 */ 234 const AddrRange &m5opRange() const { return _m5opRange; } 235 |
236 /** Is Arm Semihosting support enabled? */ 237 bool haveSemihosting() const { return semihosting != nullptr; } 238 |
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231 /** 232 * Returns a valid ArmSystem pointer if using ARM ISA, it fails 233 * otherwise. 234 */ 235 static ArmSystem* getArmSystem(ThreadContext *tc); 236 237 /** Returns true if the system of a specific thread context implements the 238 * Security Extensions --- 36 unchanged lines hidden (view full) --- 275 /** Returns the physical address mask for the system of a specific thread 276 * context 277 */ 278 static Addr physAddrMask(ThreadContext *tc); 279 280 /** Returns true if ASID is 16 bits for the system of a specific thread 281 * context while in AArch64 (ARMv8) */ 282 static bool haveLargeAsid64(ThreadContext *tc); | 239 /** 240 * Returns a valid ArmSystem pointer if using ARM ISA, it fails 241 * otherwise. 242 */ 243 static ArmSystem* getArmSystem(ThreadContext *tc); 244 245 /** Returns true if the system of a specific thread context implements the 246 * Security Extensions --- 36 unchanged lines hidden (view full) --- 283 /** Returns the physical address mask for the system of a specific thread 284 * context 285 */ 286 static Addr physAddrMask(ThreadContext *tc); 287 288 /** Returns true if ASID is 16 bits for the system of a specific thread 289 * context while in AArch64 (ARMv8) */ 290 static bool haveLargeAsid64(ThreadContext *tc); |
291 292 /** Is Arm Semihosting support enabled? */ 293 static bool haveSemihosting(ThreadContext *tc); 294 295 /** Make a Semihosting call from aarch64 */ 296 static uint64_t callSemihosting64(ThreadContext *tc, 297 uint32_t op, uint64_t param); 298 299 /** Make a Semihosting call from aarch32 */ 300 static uint32_t callSemihosting32(ThreadContext *tc, 301 uint32_t op, uint32_t param); |
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283}; 284 285class GenericArmSystem : public ArmSystem 286{ 287 public: 288 typedef GenericArmSystemParams Params; 289 const Params * 290 params() const --- 14 unchanged lines hidden --- | 302}; 303 304class GenericArmSystem : public ArmSystem 305{ 306 public: 307 typedef GenericArmSystemParams Params; 308 const Params * 309 params() const --- 14 unchanged lines hidden --- |