1/*
2 * Copyright (c) 2010, 2012-2013, 2015-2016 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ali Saidi
41 */
42
43#ifndef __ARCH_ARM_SYSTEM_HH__
44#define __ARCH_ARM_SYSTEM_HH__
45
46#include <memory>
47#include <string>
48#include <vector>
49
50#include "kern/linux/events.hh"
51#include "params/ArmSystem.hh"
52#include "params/GenericArmSystem.hh"
53#include "sim/sim_object.hh"
54#include "sim/system.hh"
55
56class GenericTimer;
57class ThreadContext;
58
59class ArmSystem : public System
60{
61 protected:
62 /**
63 * PC based event to skip the dprink() call and emulate its
64 * functionality
65 */
66 Linux::DebugPrintkEvent *debugPrintkEvent;
67
68 /** Bootloaders */
69 std::vector<std::unique_ptr<ObjectFile>> bootLoaders;
70
71 /**
72 * Pointer to the bootloader object
73 */
74 ObjectFile *bootldr;
75
76 /**
77 * True if this system implements the Security Extensions
78 */
79 const bool _haveSecurity;
80
81 /**
82 * True if this system implements the Large Physical Address Extension
83 */
84 const bool _haveLPAE;
85
86 /**
87 * True if this system implements the virtualization Extensions
88 */
89 const bool _haveVirtualization;
90
91 /**
92 * Pointer to the Generic Timer wrapper.
93 */
94 GenericTimer *_genericTimer;
95
96 /**
97 * True if the register width of the highest implemented exception level is
98 * 64 bits (ARMv8)
99 */
100 bool _highestELIs64;
101
102 /**
103 * Reset address if the highest implemented exception level is 64 bits
104 * (ARMv8)
105 */
106 const Addr _resetAddr64;
107
108 /**
109 * Supported physical address range in bits if the highest implemented
110 * exception level is 64 bits (ARMv8)
111 */
112 const uint8_t _physAddrRange64;
113
114 /**
115 * True if ASID is 16 bits in AArch64 (ARMv8)
116 */
117 const bool _haveLargeAsid64;
118
| 1/*
2 * Copyright (c) 2010, 2012-2013, 2015-2016 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ali Saidi
41 */
42
43#ifndef __ARCH_ARM_SYSTEM_HH__
44#define __ARCH_ARM_SYSTEM_HH__
45
46#include <memory>
47#include <string>
48#include <vector>
49
50#include "kern/linux/events.hh"
51#include "params/ArmSystem.hh"
52#include "params/GenericArmSystem.hh"
53#include "sim/sim_object.hh"
54#include "sim/system.hh"
55
56class GenericTimer;
57class ThreadContext;
58
59class ArmSystem : public System
60{
61 protected:
62 /**
63 * PC based event to skip the dprink() call and emulate its
64 * functionality
65 */
66 Linux::DebugPrintkEvent *debugPrintkEvent;
67
68 /** Bootloaders */
69 std::vector<std::unique_ptr<ObjectFile>> bootLoaders;
70
71 /**
72 * Pointer to the bootloader object
73 */
74 ObjectFile *bootldr;
75
76 /**
77 * True if this system implements the Security Extensions
78 */
79 const bool _haveSecurity;
80
81 /**
82 * True if this system implements the Large Physical Address Extension
83 */
84 const bool _haveLPAE;
85
86 /**
87 * True if this system implements the virtualization Extensions
88 */
89 const bool _haveVirtualization;
90
91 /**
92 * Pointer to the Generic Timer wrapper.
93 */
94 GenericTimer *_genericTimer;
95
96 /**
97 * True if the register width of the highest implemented exception level is
98 * 64 bits (ARMv8)
99 */
100 bool _highestELIs64;
101
102 /**
103 * Reset address if the highest implemented exception level is 64 bits
104 * (ARMv8)
105 */
106 const Addr _resetAddr64;
107
108 /**
109 * Supported physical address range in bits if the highest implemented
110 * exception level is 64 bits (ARMv8)
111 */
112 const uint8_t _physAddrRange64;
113
114 /**
115 * True if ASID is 16 bits in AArch64 (ARMv8)
116 */
117 const bool _haveLargeAsid64;
118
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