stage2_mmu.hh (12749:223c83ed9979) | stage2_mmu.hh (13795:e21c61d9efb8) |
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1/* 2 * Copyright (c) 2012-2013, 2015 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 96 unchanged lines hidden (view full) --- 105 typedef ArmStage2MMUParams Params; 106 Stage2MMU(const Params *p); 107 108 /** 109 * Get the port that ultimately belongs to the stage-two MMU, but 110 * is used by the two table walkers, and is exposed externally and 111 * connected through the stage-one table walker. 112 */ | 1/* 2 * Copyright (c) 2012-2013, 2015 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 96 unchanged lines hidden (view full) --- 105 typedef ArmStage2MMUParams Params; 106 Stage2MMU(const Params *p); 107 108 /** 109 * Get the port that ultimately belongs to the stage-two MMU, but 110 * is used by the two table walkers, and is exposed externally and 111 * connected through the stage-one table walker. 112 */ |
113 DmaPort& getPort() { return port; } | 113 DmaPort& getDMAPort() { return port; } |
114 115 Fault readDataUntimed(ThreadContext *tc, Addr oVAddr, Addr descAddr, 116 uint8_t *data, int numBytes, Request::Flags flags, bool isFunctional); 117 void readDataTimed(ThreadContext *tc, Addr descAddr, 118 Stage2Translation *translation, int numBytes, 119 Request::Flags flags); 120 121 TLB* stage1Tlb() const { return _stage1Tlb; } 122 TLB* stage2Tlb() const { return _stage2Tlb; } 123}; 124 125 126 127} // namespace ArmISA 128 129#endif //__ARCH_ARM_STAGE2_MMU_HH__ 130 | 114 115 Fault readDataUntimed(ThreadContext *tc, Addr oVAddr, Addr descAddr, 116 uint8_t *data, int numBytes, Request::Flags flags, bool isFunctional); 117 void readDataTimed(ThreadContext *tc, Addr descAddr, 118 Stage2Translation *translation, int numBytes, 119 Request::Flags flags); 120 121 TLB* stage1Tlb() const { return _stage1Tlb; } 122 TLB* stage2Tlb() const { return _stage2Tlb; } 123}; 124 125 126 127} // namespace ArmISA 128 129#endif //__ARCH_ARM_STAGE2_MMU_HH__ 130 |