stage2_lookup.cc (12734:eb97b1a80c5c) | stage2_lookup.cc (12736:1604f2c8ec5e) |
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1/* 2 * Copyright (c) 2010-2013, 2016 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 52 unchanged lines hidden (view full) --- 61 functional, false, tranType); 62 // Call finish if we're done already 63 if ((fault != NoFault) || (stage2Te != NULL)) { 64 // Since we directly requested the table entry (which we need later on 65 // to merge the attributes) then we've skipped some stage2 permissions 66 // checking. So call translate on stage 2 to do the checking. As the 67 // entry is now in the TLB this should always hit the cache. 68 if (fault == NoFault) { | 1/* 2 * Copyright (c) 2010-2013, 2016 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 52 unchanged lines hidden (view full) --- 61 functional, false, tranType); 62 // Call finish if we're done already 63 if ((fault != NoFault) || (stage2Te != NULL)) { 64 // Since we directly requested the table entry (which we need later on 65 // to merge the attributes) then we've skipped some stage2 permissions 66 // checking. So call translate on stage 2 to do the checking. As the 67 // entry is now in the TLB this should always hit the cache. 68 if (fault == NoFault) { |
69 if (inAArch64(tc)) | 69 if (ELIs64(tc, EL2)) |
70 fault = stage2Tlb->checkPermissions64(stage2Te, &req, mode, tc); 71 else 72 fault = stage2Tlb->checkPermissions(stage2Te, &req, mode); 73 } 74 75 mergeTe(&req, mode); 76 *destTe = stage1Te; 77 } --- 128 unchanged lines hidden --- | 70 fault = stage2Tlb->checkPermissions64(stage2Te, &req, mode, tc); 71 else 72 fault = stage2Tlb->checkPermissions(stage2Te, &req, mode); 73 } 74 75 mergeTe(&req, mode); 76 *destTe = stage1Te; 77 } --- 128 unchanged lines hidden --- |