stage2_lookup.cc (12429:beefb9f5f551) | stage2_lookup.cc (12734:eb97b1a80c5c) |
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1/* 2 * Copyright (c) 2010-2013, 2016 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 74 unchanged lines hidden (view full) --- 83{ 84 // Check again that we haven't got a fault 85 if (fault == NoFault) { 86 assert(stage2Te != NULL); 87 88 // Now we have the table entries for both stages of translation 89 // merge them and insert the result into the stage 1 TLB. See 90 // CombineS1S2Desc() in pseudocode | 1/* 2 * Copyright (c) 2010-2013, 2016 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 74 unchanged lines hidden (view full) --- 83{ 84 // Check again that we haven't got a fault 85 if (fault == NoFault) { 86 assert(stage2Te != NULL); 87 88 // Now we have the table entries for both stages of translation 89 // merge them and insert the result into the stage 1 TLB. See 90 // CombineS1S2Desc() in pseudocode |
91 stage1Te.N = stage2Te->N; | |
92 stage1Te.nonCacheable |= stage2Te->nonCacheable; 93 stage1Te.xn |= stage2Te->xn; 94 95 if (stage1Te.size > stage2Te->size) { 96 // Size mismatch also implies vpn mismatch (this is shifted by 97 // sizebits!). | 91 stage1Te.nonCacheable |= stage2Te->nonCacheable; 92 stage1Te.xn |= stage2Te->xn; 93 94 if (stage1Te.size > stage2Te->size) { 95 // Size mismatch also implies vpn mismatch (this is shifted by 96 // sizebits!). |
98 stage1Te.vpn = s1Req->getVaddr() / (stage2Te->size+1); | 97 stage1Te.vpn = s1Req->getVaddr() >> stage2Te->N; |
99 stage1Te.pfn = stage2Te->pfn; 100 stage1Te.size = stage2Te->size; | 98 stage1Te.pfn = stage2Te->pfn; 99 stage1Te.size = stage2Te->size; |
100 stage1Te.N = stage2Te->N; |
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101 } else if (stage1Te.size < stage2Te->size) { 102 // Guest 4K could well be section-backed by host hugepage! In this 103 // case a 4K entry is added but pfn needs to be adjusted. New PFN = 104 // offset into section PFN given by stage2 IPA treated as a stage1 105 // page size. | 101 } else if (stage1Te.size < stage2Te->size) { 102 // Guest 4K could well be section-backed by host hugepage! In this 103 // case a 4K entry is added but pfn needs to be adjusted. New PFN = 104 // offset into section PFN given by stage2 IPA treated as a stage1 105 // page size. |
106 stage1Te.pfn = (stage2Te->pfn * ((stage2Te->size+1) / (stage1Te.size+1))) + 107 (stage2Te->vpn / (stage1Te.size+1)); | 106 const Addr pa = (stage2Te->pfn << stage2Te->N); 107 const Addr ipa = (stage1Te.pfn << stage1Te.N); 108 stage1Te.pfn = (pa | (ipa & mask(stage2Te->N))) >> stage1Te.N; |
108 // Size remains smaller of the two. 109 } else { 110 // Matching sizes 111 stage1Te.pfn = stage2Te->pfn; 112 } 113 114 if (stage2Te->mtype == TlbEntry::MemoryType::StronglyOrdered || 115 stage1Te.mtype == TlbEntry::MemoryType::StronglyOrdered) { --- 89 unchanged lines hidden --- | 109 // Size remains smaller of the two. 110 } else { 111 // Matching sizes 112 stage1Te.pfn = stage2Te->pfn; 113 } 114 115 if (stage2Te->mtype == TlbEntry::MemoryType::StronglyOrdered || 116 stage1Te.mtype == TlbEntry::MemoryType::StronglyOrdered) { --- 89 unchanged lines hidden --- |