stacktrace.hh (6658:f4de76601762) | stacktrace.hh (6757:d86d3d6e5326) |
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1/* 2 * Copyright (c) 2005 The Regents of The University of Michigan | 1/* 2 * Copyright (c) 2005 The Regents of The University of Michigan |
3 * Copyright (c) 2007-2008 The Florida State University | |
4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer; 10 * redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the --- 9 unchanged lines hidden (view full) --- 21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * | 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the --- 9 unchanged lines hidden (view full) --- 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * |
29 * Authors: Ali Saidi 30 * Stephen Hines | 28 * Authors: Nathan Binkert |
31 */ 32 33#ifndef __ARCH_ARM_STACKTRACE_HH__ 34#define __ARCH_ARM_STACKTRACE_HH__ 35 36#include "base/trace.hh" | 29 */ 30 31#ifndef __ARCH_ARM_STACKTRACE_HH__ 32#define __ARCH_ARM_STACKTRACE_HH__ 33 34#include "base/trace.hh" |
37#include "config/the_isa.hh" | |
38#include "cpu/static_inst.hh" 39 40class ThreadContext; | 35#include "cpu/static_inst.hh" 36 37class ThreadContext; |
41class StackTrace; 42 | |
43namespace ArmISA 44{ 45 | 38namespace ArmISA 39{ 40 |
41class StackTrace; 42 |
|
46class ProcessInfo 47{ 48 private: 49 ThreadContext *tc; 50 51 int thread_info_size; 52 int task_struct_size; 53 int task_off; --- 6 unchanged lines hidden (view full) --- 60 Addr task(Addr ksp) const; 61 int pid(Addr ksp) const; 62 std::string name(Addr ksp) const; 63}; 64 65class StackTrace 66{ 67 protected: | 43class ProcessInfo 44{ 45 private: 46 ThreadContext *tc; 47 48 int thread_info_size; 49 int task_struct_size; 50 int task_off; --- 6 unchanged lines hidden (view full) --- 57 Addr task(Addr ksp) const; 58 int pid(Addr ksp) const; 59 std::string name(Addr ksp) const; 60}; 61 62class StackTrace 63{ 64 protected: |
68 typedef TheISA::MachInst MachInst; | 65 typedef ArmISA::MachInst MachInst; |
69 private: 70 ThreadContext *tc; 71 std::vector<Addr> stack; 72 73 private: 74 bool isEntry(Addr addr); 75 bool decodePrologue(Addr sp, Addr callpc, Addr func, int &size, Addr &ra); 76 bool decodeSave(MachInst inst, int ®, int &disp); --- 13 unchanged lines hidden (view full) --- 90 } 91 92 bool valid() const { return tc != NULL; } 93 bool trace(ThreadContext *tc, StaticInstPtr inst); 94 95 public: 96 const std::vector<Addr> &getstack() const { return stack; } 97 | 66 private: 67 ThreadContext *tc; 68 std::vector<Addr> stack; 69 70 private: 71 bool isEntry(Addr addr); 72 bool decodePrologue(Addr sp, Addr callpc, Addr func, int &size, Addr &ra); 73 bool decodeSave(MachInst inst, int ®, int &disp); --- 13 unchanged lines hidden (view full) --- 87 } 88 89 bool valid() const { return tc != NULL; } 90 bool trace(ThreadContext *tc, StaticInstPtr inst); 91 92 public: 93 const std::vector<Addr> &getstack() const { return stack; } 94 |
98 static const int user = 1; 99 static const int console = 2; 100 static const int unknown = 3; 101 | |
102#if TRACING_ON 103 private: 104 void dump(); 105 106 public: 107 void dprintf() { if (DTRACE(Stack)) dump(); } 108#else 109 public: --- 9 unchanged lines hidden (view full) --- 119 120 if (valid()) 121 clear(); 122 123 trace(tc, !inst->isReturn()); 124 return true; 125} 126 | 95#if TRACING_ON 96 private: 97 void dump(); 98 99 public: 100 void dprintf() { if (DTRACE(Stack)) dump(); } 101#else 102 public: --- 9 unchanged lines hidden (view full) --- 112 113 if (valid()) 114 clear(); 115 116 trace(tc, !inst->isReturn()); 117 return true; 118} 119 |
127} | 120} // Namespace ArmISA |
128 129#endif // __ARCH_ARM_STACKTRACE_HH__ | 121 122#endif // __ARCH_ARM_STACKTRACE_HH__ |