remote_gdb.cc (12221:3629e25eb2ec) | remote_gdb.cc (12449:2260f4a68210) |
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1/* 2 * Copyright 2015 LabWare 3 * Copyright 2014 Google Inc. 4 * Copyright (c) 2010, 2013, 2016 ARM Limited 5 * All rights reserved 6 * 7 * The license below extends only to copyright in the software and shall 8 * not be construed as granting a license to any other intellectual --- 150 unchanged lines hidden (view full) --- 159#include "mem/physical.hh" 160#include "mem/port.hh" 161#include "sim/full_system.hh" 162#include "sim/system.hh" 163 164using namespace std; 165using namespace ArmISA; 166 | 1/* 2 * Copyright 2015 LabWare 3 * Copyright 2014 Google Inc. 4 * Copyright (c) 2010, 2013, 2016 ARM Limited 5 * All rights reserved 6 * 7 * The license below extends only to copyright in the software and shall 8 * not be construed as granting a license to any other intellectual --- 150 unchanged lines hidden (view full) --- 159#include "mem/physical.hh" 160#include "mem/port.hh" 161#include "sim/full_system.hh" 162#include "sim/system.hh" 163 164using namespace std; 165using namespace ArmISA; 166 |
167RemoteGDB::RemoteGDB(System *_system, ThreadContext *tc) 168 : BaseRemoteGDB(_system, tc), regCache32(this), regCache64(this) | 167RemoteGDB::RemoteGDB(System *_system, ThreadContext *tc, int _port) 168 : BaseRemoteGDB(_system, tc, _port), regCache32(this), regCache64(this) |
169{ 170} 171 172/* 173 * Determine if the mapping at va..(va+len) is valid. 174 */ 175bool 176RemoteGDB::acc(Addr va, size_t len) 177{ 178 if (FullSystem) { 179 for (ChunkGenerator gen(va, len, PageBytes); !gen.done(); gen.next()) { | 169{ 170} 171 172/* 173 * Determine if the mapping at va..(va+len) is valid. 174 */ 175bool 176RemoteGDB::acc(Addr va, size_t len) 177{ 178 if (FullSystem) { 179 for (ChunkGenerator gen(va, len, PageBytes); !gen.done(); gen.next()) { |
180 if (!virtvalid(context, gen.addr())) { | 180 if (!virtvalid(context(), gen.addr())) { |
181 DPRINTF(GDBAcc, "acc: %#x mapping is invalid\n", va); 182 return false; 183 } 184 } 185 186 DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va); 187 return true; 188 } else { 189 TlbEntry entry; 190 //Check to make sure the first byte is mapped into the processes address 191 //space. | 181 DPRINTF(GDBAcc, "acc: %#x mapping is invalid\n", va); 182 return false; 183 } 184 } 185 186 DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va); 187 return true; 188 } else { 189 TlbEntry entry; 190 //Check to make sure the first byte is mapped into the processes address 191 //space. |
192 if (context->getProcessPtr()->pTable->lookup(va, entry)) | 192 if (context()->getProcessPtr()->pTable->lookup(va, entry)) |
193 return true; 194 return false; 195 } 196} 197 198void 199RemoteGDB::AArch64GdbRegCache::getRegs(ThreadContext *context) 200{ --- 95 unchanged lines hidden (view full) --- 296 context->pcState(r.gpr[15]); 297 298 // One day somebody will implement transfer of FPRs correctly. 299 300 context->setMiscReg(MISCREG_FPSCR, r.fpscr); 301 context->setMiscRegNoEffect(MISCREG_CPSR, r.cpsr); 302} 303 | 193 return true; 194 return false; 195 } 196} 197 198void 199RemoteGDB::AArch64GdbRegCache::getRegs(ThreadContext *context) 200{ --- 95 unchanged lines hidden (view full) --- 296 context->pcState(r.gpr[15]); 297 298 // One day somebody will implement transfer of FPRs correctly. 299 300 context->setMiscReg(MISCREG_FPSCR, r.fpscr); 301 context->setMiscRegNoEffect(MISCREG_CPSR, r.cpsr); 302} 303 |
304RemoteGDB::BaseGdbRegCache* | 304BaseGdbRegCache* |
305RemoteGDB::gdbRegs() 306{ | 305RemoteGDB::gdbRegs() 306{ |
307 if (inAArch64(context)) | 307 if (inAArch64(context())) |
308 return ®Cache64; 309 else 310 return ®Cache32; 311} | 308 return ®Cache64; 309 else 310 return ®Cache32; 311} |