registers.hh (9920:028e4da64b42) registers.hh (10037:5cac77888310)
1/*
1/*
2 * Copyright (c) 2010 ARM Limited
2 * Copyright (c) 2010-2011 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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69typedef uint64_t MiscReg;
70
71// dummy typedef since we don't have CC regs
72typedef uint8_t CCReg;
73
74// Constants Related to the number of registers
75const int NumIntArchRegs = NUM_ARCH_INTREGS;
76// The number of single precision floating point registers
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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69typedef uint64_t MiscReg;
70
71// dummy typedef since we don't have CC regs
72typedef uint8_t CCReg;
73
74// Constants Related to the number of registers
75const int NumIntArchRegs = NUM_ARCH_INTREGS;
76// The number of single precision floating point registers
77const int NumFloatArchRegs = 64;
78const int NumFloatSpecialRegs = 8;
77const int NumFloatV7ArchRegs = 64;
78const int NumFloatV8ArchRegs = 128;
79const int NumFloatSpecialRegs = 32;
79
80const int NumIntRegs = NUM_INTREGS;
80
81const int NumIntRegs = NUM_INTREGS;
81const int NumFloatRegs = NumFloatArchRegs + NumFloatSpecialRegs;
82const int NumFloatRegs = NumFloatV8ArchRegs + NumFloatSpecialRegs;
82const int NumCCRegs = 0;
83const int NumMiscRegs = NUM_MISCREGS;
84
85const int TotalNumRegs = NumIntRegs + NumFloatRegs + NumMiscRegs;
86
87// semantically meaningful register indices
88const int ReturnValueReg = 0;
89const int ReturnValueReg1 = 1;
90const int ReturnValueReg2 = 2;
91const int NumArgumentRegs = 4;
83const int NumCCRegs = 0;
84const int NumMiscRegs = NUM_MISCREGS;
85
86const int TotalNumRegs = NumIntRegs + NumFloatRegs + NumMiscRegs;
87
88// semantically meaningful register indices
89const int ReturnValueReg = 0;
90const int ReturnValueReg1 = 1;
91const int ReturnValueReg2 = 2;
92const int NumArgumentRegs = 4;
93const int NumArgumentRegs64 = 8;
92const int ArgumentReg0 = 0;
93const int ArgumentReg1 = 1;
94const int ArgumentReg2 = 2;
95const int ArgumentReg3 = 3;
96const int FramePointerReg = 11;
97const int StackPointerReg = INTREG_SP;
98const int ReturnAddressReg = INTREG_LR;
99const int PCReg = INTREG_PC;

--- 22 unchanged lines hidden --- 		94const int ArgumentReg0 = 0;
95const int ArgumentReg1 = 1;
96const int ArgumentReg2 = 2;
97const int ArgumentReg3 = 3;
98const int FramePointerReg = 11;
99const int StackPointerReg = INTREG_SP;
100const int ReturnAddressReg = INTREG_LR;
101const int PCReg = INTREG_PC;

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