registers.hh (7650:42684e4656e6) registers.hh (7848:cc5e64f8423f)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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44#define __ARCH_ARM_REGISTERS_HH__
45
46#include "arch/arm/max_inst_regs.hh"
47#include "arch/arm/intregs.hh"
48#include "arch/arm/miscregs.hh"
49
50namespace ArmISA {
51
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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44#define __ARCH_ARM_REGISTERS_HH__
45
46#include "arch/arm/max_inst_regs.hh"
47#include "arch/arm/intregs.hh"
48#include "arch/arm/miscregs.hh"
49
50namespace ArmISA {
51
52using ArmISAInst::MaxInstSrcRegs;
52
53// For a predicated instruction, we need all the
54// destination registers to also be sources
55const int MaxInstSrcRegs = ArmISAInst::MaxInstDestRegs +
56 ArmISAInst::MaxInstSrcRegs;
53using ArmISAInst::MaxInstDestRegs;
54
55typedef uint16_t RegIndex;
56
57typedef uint64_t IntReg;
58
59// floating point register file entry type
60typedef uint32_t FloatRegBits;

--- 51 unchanged lines hidden --- 		57using ArmISAInst::MaxInstDestRegs;
58
59typedef uint16_t RegIndex;
60
61typedef uint64_t IntReg;
62
63// floating point register file entry type
64typedef uint32_t FloatRegBits;

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